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Fri, 23 Oct 2026 00:17:21 -0700 (PDT) Received: from [10.204.79.28] ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ea7b34ddb5sm6685885ad.12.2026.10.23.00.17.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 23 Oct 2026 00:17:20 -0700 (PDT) From: Jayant Shekhar X-Google-Original-From: Jayant Shekhar Message-ID: Date: Fri, 23 Oct 2026 12:47:10 +0530 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 08/13] drm/msm/dcp: Add DSI bridge To: Dmitry Baryshkov , Jayant Shekhar Cc: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , =?UTF-8?Q?Christian_K=C3=B6nig?= , Philipp Stanner , Bjorn Andersson , Konrad Dybcio , Abel Vesa , "Joerg Roedel (AMD)" , Will Deacon , Robin Murphy , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, iommu@lists.linux.dev References: <20261015-jshekhar-drm-msm-dcp-v1-v1-0-48aad0fe4f72@oss.qualcomm.com> <20261015-jshekhar-drm-msm-dcp-v1-v1-8-48aad0fe4f72@oss.qualcomm.com> Content-Language: en-US In-Reply-To: Content-Type: text/plain; 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Translate panel, mode, >> power, DCS, and display-session operations into HFI commands, together with >> the KMS session preparation and CRTC integration required by the bridge. >> >> Signed-off-by: Jayant Shekhar >> Assisted-by: LLM >> --- >> drivers/gpu/drm/msm/Makefile | 1 + >> drivers/gpu/drm/msm/dcp/dcp_crtc.c | 14 + >> drivers/gpu/drm/msm/dcp/dcp_dpu_kms.c | 45 ++ >> drivers/gpu/drm/msm/dcp/dcp_dpu_kms.h | 4 +- >> drivers/gpu/drm/msm/dcp/dcp_dsi_bridge.c | 1140 ++++++++++++++++++++++++++++++ >> drivers/gpu/drm/msm/dcp/dcp_dsi_bridge.h | 69 ++ >> drivers/gpu/drm/msm/dcp/dcp_plane.c | 8 +- >> drivers/gpu/drm/msm/dcp/dcp_plane.h | 1 + >> 8 files changed, 1279 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile >> index e7d24be72113..9910bd4f306d 100644 >> --- a/drivers/gpu/drm/msm/Makefile >> +++ b/drivers/gpu/drm/msm/Makefile >> @@ -72,6 +72,7 @@ msm-display-$(CONFIG_DRM_MSM_MDP5) += \ >> msm-display-$(CONFIG_DRM_MSM_DCP) += \ >> dcp/dcp_crtc.o \ >> dcp/dcp_dpu_kms.o \ >> + dcp/dcp_dsi_bridge.o \ >> dcp/dcp_hfi_core.o \ >> dcp/dcp_hfi_crtc.o \ >> dcp/dcp_hfi_dsi.o \ >> diff --git a/drivers/gpu/drm/msm/dcp/dcp_crtc.c b/drivers/gpu/drm/msm/dcp/dcp_crtc.c >> index ede81881d495..fb8920d44f8a 100644 >> --- a/drivers/gpu/drm/msm/dcp/dcp_crtc.c >> +++ b/drivers/gpu/drm/msm/dcp/dcp_crtc.c >> @@ -147,6 +147,12 @@ static void dcp_crtc_atomic_begin(struct drm_crtc *crtc, >> return; >> } >> >> + ret = dcp_dpu_kms_prepare_crtc_session(dcp_kms, crtc); > Do you have the session mechanism described somewhere? > The session is an HFI display session created with HFI_CMD_DISPLAY_ENABLE. DCP requires a valid session ID before accepting destination-ROI, plane-property, and frame-trigger commands. dcp_dpu_kms_prepare_crtc_session() finds the DSI bridge associated with the CRTC and calls dcp_dsi_bridge_prepare_session(). That function opens the HFI display session once, stores the firmware-assigned session ID, and publishes it to the CRTC. The session is then used by the remaining operations in atomic_begin() and atomic_flush(). The bridge’s atomic_pre_enable() verifies that the session was prepared, while atomic_post_disable() sends DISPLAY_CLOSE and clears it. >> + if (ret) { >> + cstate->hfi_error = ret; >> + return; >> + } >> + >> if (!dcp_crtc_get_session(crtc, &session_id)) { >> cstate->hfi_error = -ENODEV; >> return; >> @@ -567,6 +573,7 @@ static int dcp_crtc_atomic_check(struct drm_crtc *crtc, >> const struct drm_plane_state *pstate; >> u32 max_width, max_height; >> u32 mixer_count; >> + bool needs_dirtyfb; >> int num_planes = 0; >> int ret; >> >> @@ -577,6 +584,8 @@ static int dcp_crtc_atomic_check(struct drm_crtc *crtc, >> if (!crtc_state->enable || !crtc_state->active) >> return 0; >> >> + needs_dirtyfb = dcp_dpu_kms_needs_dirtyfb(dcp_kms, crtc); >> + >> mixer_count = cstate->topology_mixer_count; >> if (mixer_count < 1 || mixer_count > DCP_MAX_MIXERS) { >> drm_err(crtc->dev, >> @@ -606,8 +615,13 @@ static int dcp_crtc_atomic_check(struct drm_crtc *crtc, >> >> /* Limit visible planes to the firmware blend-stage count. */ >> drm_atomic_crtc_state_for_each_plane_state(plane, pstate, crtc_state) { >> + struct dcp_plane_state *dcp_pstate; >> + >> if (!pstate || !pstate->visible) >> continue; >> + >> + dcp_pstate = to_dcp_plane_state((struct drm_plane_state *)pstate); >> + dcp_pstate->needs_dirtyfb = needs_dirtyfb; >> num_planes++; >> } >> >> diff --git a/drivers/gpu/drm/msm/dcp/dcp_dpu_kms.c b/drivers/gpu/drm/msm/dcp/dcp_dpu_kms.c >> index 573376785be2..d465164b158b 100644 >> --- a/drivers/gpu/drm/msm/dcp/dcp_dpu_kms.c >> +++ b/drivers/gpu/drm/msm/dcp/dcp_dpu_kms.c >> @@ -7,6 +7,30 @@ >> #include >> >> #include "dcp_dpu_kms.h" >> +#include "dcp_dsi_bridge.h" >> + >> +int dcp_dpu_kms_prepare_crtc_session(struct dcp_dpu_kms *dpu_kms, > s/dpu_kms/dcp_kms/ > Will address this in v2. >> + struct drm_crtc *crtc) >> +{ >> + u32 i; >> + >> + if (!dpu_kms || !crtc) >> + return -EINVAL; > As usual. No, neither of them can be NULL here. > >> + >> + for (i = 0; i < ARRAY_SIZE(dpu_kms->dsi_bridge); i++) { >> + struct dcp_dsi_bridge *bridge = dpu_kms->dsi_bridge[i]; >> + >> + if (!bridge) >> + continue; > The bridge can be NULL, Do you see the difference? This is an actual > guard, which makes sense. First two are pure noise. They make one > actually think that dpu_kms or crtc can be NULL here. They can't. > >> + if (dcp_dpu_kms_get_crtc(dpu_kms, bridge->intf_idx) != crtc) >> + continue; >> + >> + return dcp_dsi_bridge_prepare_session(bridge, >> + &crtc->state->adjusted_mode); >> + } >> + >> + return -ENODEV; >> +} >> >> struct drm_crtc *dcp_dpu_kms_get_crtc(struct dcp_dpu_kms *dpu_kms, >> u32 display_id) >> @@ -25,3 +49,24 @@ struct drm_crtc *dcp_dpu_kms_get_crtc(struct dcp_dpu_kms *dpu_kms, >> return NULL; >> } >> >> +bool dcp_dpu_kms_needs_dirtyfb(struct dcp_dpu_kms *dpu_kms, >> + struct drm_crtc *crtc) >> +{ >> + u32 i; >> + >> + if (!dpu_kms || !crtc) >> + return false; >> + >> + for (i = 0; i < ARRAY_SIZE(dpu_kms->dsi_bridge); i++) { >> + struct dcp_dsi_bridge *bridge = dpu_kms->dsi_bridge[i]; >> + >> + if (!bridge || >> + dcp_dpu_kms_get_crtc(dpu_kms, bridge->intf_idx) != crtc) >> + continue; >> + >> + return bridge->dsi_device && >> + !(bridge->dsi_device->mode_flags & MIPI_DSI_MODE_VIDEO); >> + } >> + >> + return false; >> +} >> diff --git a/drivers/gpu/drm/msm/dcp/dcp_dpu_kms.h b/drivers/gpu/drm/msm/dcp/dcp_dpu_kms.h >> index 4601571a994f..650ed7d53a49 100644 >> --- a/drivers/gpu/drm/msm/dcp/dcp_dpu_kms.h >> +++ b/drivers/gpu/drm/msm/dcp/dcp_dpu_kms.h >> @@ -38,7 +38,9 @@ struct dcp_dpu_kms { >> >> #define to_dcp_dpu_kms(x) container_of(x, struct dcp_dpu_kms, base) >> struct drm_crtc *dcp_dpu_kms_get_crtc(struct dcp_dpu_kms *dpu_kms, >> - u32 display_id); >> + u32 display_id); >> +bool dcp_dpu_kms_needs_dirtyfb(struct dcp_dpu_kms *dpu_kms, >> + struct drm_crtc *crtc); >> int dcp_dpu_kms_prepare_crtc_session(struct dcp_dpu_kms *dpu_kms, >> struct drm_crtc *crtc); >> >> diff --git a/drivers/gpu/drm/msm/dcp/dcp_dsi_bridge.c b/drivers/gpu/drm/msm/dcp/dcp_dsi_bridge.c >> new file mode 100644 >> index 000000000000..3a472373fb1e >> --- /dev/null >> +++ b/drivers/gpu/drm/msm/dcp/dcp_dsi_bridge.c >> @@ -0,0 +1,1140 @@ >> +// SPDX-License-Identifier: GPL-2.0-only >> +/* >> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. >> + * >> + * DCP DSI bridge driver. >> + * >> + * Implements a DRM bridge for DSI displays in the DCP firmware-delegated >> + * architecture. DCP firmware owns the DSI PHY and controller; this driver >> + * uses HFI commands to configure DSI parameters rather than direct register >> + * writes. >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +#include