Re: [PATCH v2 1/3] x86/resctrl: Fix ABMC counter programming for extended counter ranges

[Babu Moger <babu.moger@amd.com>]

Hi Reinette,

On 9/16/26 09:58, Reinette Chatre wrote:
> Hi Babu,
> 
> On 9/14/26 5:18 PM, Moger, Babu wrote:
>>
>> The original issue arose when programming a Counter ID wider than 5 bits. To address that issue, the Counter ID width needs to be increased to 12 bits.
>>
>> Currently, the RMID width is 12 bits, and there is no hardware that supports a width greater than 12 bits.
>>
>> How about we address the Counter ID issue for now and revisit the RMID width when the specification changes?
>>
>> Would that work?
> 
> Neither change seems to be reflected in any public spec. The comment in this patch
> seems to be that the upcoming spec change will cover both?
> 
> 	The AMD64 Architecture Programmer's Manual [1] available at [2] will be
> 	updated accordingly in a future revision to document the expanded cntr_id
> 	and bw_src field definitions.
> 
> If you thus plan to change RMID width when the specification changes then it is not clear
> to me how the timing is different from the counter ID width change.
> 
> In the end it is up to you though since the impact is on AMD hardware that you
> are best to judge.
> 
Thanks. The immediate priority is to fix the counter programming issue.

Thanks,
Babu