From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 651D027453 for ; Sat, 6 Jun 2026 02:48:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780714089; cv=none; b=jbAVIvJiiWWiC5A83M9+pfbavpC/7qwr9cizf0luUHAvlS3k8zDdpfVekv1EvBZKsZkQuVLipb32+ernbz+w+YxOv1Qe1bbT8Y3zdXv+NRGzY7AnDIye8qe/7MkgBgm+R1doZxFYzfs1TIGKgI+HBky3qfakPa8XmLy2kb4ez0s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780714089; c=relaxed/simple; bh=wzycBpk0BYouCw7/j6yjLbFp+R+53GVLGnC97Isy0Hg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=IXPif9VdEaeek71LP04XC9rvqhc3DaO3qgjXK2j2R9y5DD2QBNDe/MNAb2yP1gGIsheK9L3slBsmL5HxCSI+tfydHWtGhyEgt1nKHFICTPU54cHUxqarlFdr/W3v94XnmD+h0USRlNkrDrujAngWbGyQync8Zd0G8lkU54WqAh8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=eNFovORJ; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="eNFovORJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1780714088; x=1812250088; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wzycBpk0BYouCw7/j6yjLbFp+R+53GVLGnC97Isy0Hg=; b=eNFovORJMPaT/J5KRajXGo2tmWlpSMrmcH1MAROcqGYYGgR3aEVtowHr TRT/yzpHZSJfR4euzr4FnXmzIErxE9loOn4cHXfbiB15S/kn/+ZrQpThI jz17m4OxWHuMPlvJXVOmTbzfJSTboqMggThGD2n383u3tQtfLtdzi10bl K9Op3gzbDWG5XbqAdtlp9QahPIyuNvWY5Ag+4p8LnrSvqb1ib7//AX8IG c+axRkE2HdYor9bz0DvfJLmmAru5U6zu2m/ZM4pv1MOXhl0mp62OJuKBf 5ZVmHylgmQ/znjMCRzZDRBz1S3Nyy3fafOU9YEvKlszfyKPy1eWxNdDq+ Q==; X-CSE-ConnectionGUID: xzUbmiwlQHmPDTJKIBbfQA== X-CSE-MsgGUID: X1u3HkV7TL2/gusfKH6jXw== X-IronPort-AV: E=McAfee;i="6800,10657,11808"; a="85167163" X-IronPort-AV: E=Sophos;i="6.24,189,1774335600"; d="scan'208";a="85167163" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jun 2026 19:48:07 -0700 X-CSE-ConnectionGUID: A8w5I5u+SHaInGhZlhRx8w== X-CSE-MsgGUID: wH7zkJE7QJ2TQk/Xr8sA1Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,189,1774335600"; d="scan'208";a="268690967" Received: from chenyu-dev.sh.intel.com ([10.239.62.107]) by fmviesa002.fm.intel.com with ESMTP; 05 Jun 2026 19:48:02 -0700 From: Chen Yu To: tony.luck@intel.com, reinette.chatre@intel.com Cc: x86@kernel.org, linux-kernel@vger.kernel.org, bp@alien8.de, tglx@kernel.org, mingo@redhat.com, dave.hansen@linux.intel.com, hpa@zytor.com, dave.martin@arm.com, james.morse@arm.com, fenghuay@nvidia.com, babu.moger@amd.com, anil.keshavamurthy@broadcom.com Subject: [PATCH v3 5/6] fs/resctrl: Do not invoke smp_processor_id() in preemptible context Date: Sat, 6 Jun 2026 10:38:13 +0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Tony Luck __l3_mon_event_count() and __l3_mon_event_count_sum() call smp_processor_id() to obtain the current CPU. However, some monitor events can be read from any CPU in task context via mon_event_count(); in that case the calling context is preemptible and smp_processor_id() triggers a debug warning. Fix this by skipping the current-CPU lookup when the event's any_cpu flag is set, since such events do not need to run on a specific CPU. Signed-off-by: Tony Luck Signed-off-by: Chen Yu --- fs/resctrl/monitor.c | 41 +++++++++++++++++++++++++++++++---------- 1 file changed, 31 insertions(+), 10 deletions(-) diff --git a/fs/resctrl/monitor.c b/fs/resctrl/monitor.c index 9fd901c78dc6..3e8995e3380e 100644 --- a/fs/resctrl/monitor.c +++ b/fs/resctrl/monitor.c @@ -417,9 +417,36 @@ static void mbm_cntr_free(struct rdt_l3_mon_domain *d, int cntr_id) memset(&d->cntr_cfg[cntr_id], 0, sizeof(*d->cntr_cfg)); } +/** + * cpu_on_correct_domain() - Check if current CPU is in the correct domain for the event. + * @rr: The rmid_read structure containing event and domain information. + * + * Context: Preemptible process context when @rr->evt->any_cpu is set. + * Non-migratable process context (via smp_call_on_cpu()) or + * non-preemptible context (via smp_call_function_any()) when + * the event must be read on a specific CPU. + * Return: true if the current CPU can read this event, false otherwise. + */ +static bool cpu_on_correct_domain(struct rmid_read *rr) +{ + int cpu; + + /* Any CPU is OK for this event */ + if (rr->evt->any_cpu) + return true; + + cpu = smp_processor_id(); + + /* Single domain. Must be on a CPU in that domain. */ + if (rr->hdr) + return cpumask_test_cpu(cpu, &rr->hdr->cpu_mask); + + /* Summing domains that share a cache, must be on a CPU for that cache. */ + return cpumask_test_cpu(cpu, &rr->ci->shared_cpu_map); +} + static int __l3_mon_event_count(struct rdtgroup *rdtgrp, struct rmid_read *rr) { - int cpu = smp_processor_id(); u32 closid = rdtgrp->closid; u32 rmid = rdtgrp->mon.rmid; struct rdt_l3_mon_domain *d; @@ -452,9 +479,6 @@ static int __l3_mon_event_count(struct rdtgroup *rdtgrp, struct rmid_read *rr) return 0; } - /* Reading a single domain, must be on a CPU in that domain. */ - if (!cpumask_test_cpu(cpu, &d->hdr.cpu_mask)) - return -EINVAL; if (rr->is_mbm_cntr) rr->err = resctrl_arch_cntr_read(rr->r, d, closid, rmid, cntr_id, rr->evt->evtid, &tval); @@ -472,7 +496,6 @@ static int __l3_mon_event_count(struct rdtgroup *rdtgrp, struct rmid_read *rr) static int __l3_mon_event_count_sum(struct rdtgroup *rdtgrp, struct rmid_read *rr) { - int cpu = smp_processor_id(); u32 closid = rdtgrp->closid; u32 rmid = rdtgrp->mon.rmid; struct rdt_l3_mon_domain *d; @@ -490,10 +513,6 @@ static int __l3_mon_event_count_sum(struct rdtgroup *rdtgrp, struct rmid_read *r return -EINVAL; } - /* Summing domains that share a cache, must be on a CPU for that cache. */ - if (!cpumask_test_cpu(cpu, &rr->ci->shared_cpu_map)) - return -EINVAL; - /* * Legacy files must report the sum of an event across all * domains that share the same L3 cache instance. @@ -524,7 +543,9 @@ static int __mon_event_count(struct rdtgroup *rdtgrp, struct rmid_read *rr) { switch (rr->r->rid) { case RDT_RESOURCE_L3: - WARN_ON_ONCE(rr->evt->any_cpu); + if (!cpu_on_correct_domain(rr)) + return -EINVAL; + if (rr->hdr) return __l3_mon_event_count(rdtgrp, rr); else -- 2.25.1