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smtp.subspace.kernel.org; dkim=pass header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=QW79knK0; arc=none smtp.remote-ip=100.103.45.18 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F3B7F606A31B; Wed, 4 Nov 2026 16:12:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key, unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=QW79knK0 Received: by smtp.kernel.org (Postfix) with ESMTPSA id EA6FC1F000C1; Wed, 4 Nov 2026 16:12:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1793808755; bh=hDl4PAFBFdAxGGCE/6jWuXBB1IpIjPt1fg20gM2r10A=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=QW79knK04aJ+gvnEkZj7ChwVy4Dc2I5bITuiXfzbHjFbrgft6it13HfjTBa3/ApaM 94OcaagPTMRSooOHER6AZf8dwBqUCkLr7sPrrV9IJkdxzB5by43P8LE0z9/aTuH1AF V1cH99VibUQesn9KcSpet+Pii1p3GSf00+6KL/AYnbekK5jqha8VUtVWotNyC40Ft9 fe8nUFUfupbrV7xGGRChMrhENfSiyks2X2XqwriaGL1jISaX3gCAhhTvFtr0Jhd2tO 6z5P4dP7eImJtaNrIS++Pq2Ad0ddd/1tVZSan6Gj5SO8ReOGa/fvm+eWWtqi+l/RLQ uiqLx2Ab1Vuvw== Message-ID: Date: Wed, 4 Nov 2026 17:12:28 +0100 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] dt-bindings: media: qcom,glymur-camss: Use CSIPHY indices for ports To: Nihal Kumar Gupta Cc: Bryan O'Donoghue , Vladimir Zapolskiy , Loic Poulain , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Suresh Vankadara , Vikram Sharma References: <20261102-glymur_camss-v1-0-fcb619fc7319@oss.qualcomm.com> <20261102-glymur_camss-v1-1-fcb619fc7319@oss.qualcomm.com> <20261104-real-nebulous-ostrich-017e92@quoll> <72064a9a-1b2e-4c24-99e2-2cc15a8dd7f1@oss.qualcomm.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 04/11/2026 17:00, Nihal Kumar Gupta wrote: > > > On 04-11-2026 19:22, Krzysztof Kozlowski wrote: >>> Glymur describes CSI2 PHYs as standalone nodes, but the CAMSS binding >>> still models CSIPHY4 as port@3 from the X1E80100 csiphy_res[] layout, >>> where entry 3 carried CSIPHY id 4. >> You also remove port 2 without explanation. >> >> >>> Describe the hardware connection directly by allowing ports 0, 1 and 4, >>> and using port@4 for CSIPHY4. >> All this is confusing, why do you introduce gaps? What is the reason? >> Your datasheet naming does not matter. > > Glymur CAMSS has populated inputs for CSIPHY0, CSIPHY1 and CSIPHY4, so I > used a sparse pattern for those ports only. port@0 is CSIPHY0 port@1 is CSIPHY1 port@2 is CSIPHY4 What is the problem exactly you are solving? > > That is confusing for the schema. I will allow the continuous range > port@0 through port@4 and keep the example limited to the populated > Glymur ports. > Best regards, Krzysztof