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Subject: Re: [PATCH v3 1/3] dt-bindings: memory-controllers: add StarFive
 JH7110 SoC DMC
To: Krzysztof Kozlowski <krzk@kernel.org>, Rob Herring <robh@kernel.org>,
 Conor Dooley <conor+dt@kernel.org>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
 linux-kernel@vger.kernel.org, Hal Feng <hal.feng@starfivetech.com>,
 Minda Chen <minda.chen@starfivetech.com>
References: <20250823100159.203925-1-e@freeshell.de>
 <20250823100159.203925-2-e@freeshell.de>
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From: E Shattow <e@freeshell.de>
In-Reply-To: <20250823100159.203925-2-e@freeshell.de>
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On 8/23/25 08:20, Krzysztof Kozlowski wrote:
> On 23/08/2025 10:58, E Shattow wrote:
>> Describe JH7110 SoC DDR external memory interface.
>>
>> Signed-off-by: E Shattow <e@freeshell.de>
>
> Don't send the same patch multiple times. To which one people should
> respond?
>
> Best regards,
> Krzysztof

Respond to v3 RESEND (this thread), or I may collect responses from
either thread they are the same content. I'd missed a linux-riscv list
CC line on a patch and that confused patchwork, and then I missed
'RESEND' in subject for the re-send series after the cover letter.
Patchwork sees the RESEND series now, and sorry for the added noise. -E