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Fri, 03 Oct 2025 19:42:00 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHoqhjBr0QjJZhFy4pINP5TXEFjwtPrvEKpTZgZJvp0XgVHp0FpeliOUWBrj6cq1uLbRLNrvA== X-Received: by 2002:a05:6a00:8c6:b0:781:2538:bfb4 with SMTP id d2e1a72fcca58-78c98d5cb4cmr5364023b3a.10.1759545719824; Fri, 03 Oct 2025 19:41:59 -0700 (PDT) Received: from [10.216.33.177] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-78b01f9a2b9sm6189511b3a.19.2025.10.03.19.41.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 Oct 2025 19:41:59 -0700 (PDT) Message-ID: Date: Sat, 4 Oct 2025 08:11:48 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V7 3/5] dt-bindings: iio: adc: Add support for QCOM PMIC5 Gen3 ADC To: Jonathan Cameron Cc: Krzysztof Kozlowski , Krzysztof Kozlowski , robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, agross@kernel.org, andersson@kernel.org, lumag@kernel.org, dmitry.baryshkov@oss.qualcomm.com, konradybcio@kernel.org, daniel.lezcano@linaro.org, sboyd@kernel.org, amitk@kernel.org, thara.gopinath@gmail.com, lee@kernel.org, rafael@kernel.org, subbaraman.narayanamurthy@oss.qualcomm.com, david.collins@oss.qualcomm.com, anjelique.melendez@oss.qualcomm.com, kamal.wadhwa@oss.qualcomm.com, rui.zhang@intel.com, lukasz.luba@arm.com, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, cros-qcom-dts-watchers@chromium.org, quic_kotarake@quicinc.com, neil.armstrong@linaro.org, stephan.gerhold@linaro.org, Jonathan Cameron References: <20250826083657.4005727-1-jishnu.prakash@oss.qualcomm.com> <20250826083657.4005727-4-jishnu.prakash@oss.qualcomm.com> <20250829-classic-dynamic-clam-addbd8@kuoka> <5d662148-408f-49e1-a769-2a5d61371cae@oss.qualcomm.com> <4e974e77-adfc-49e5-90c8-cf8996ded513@kernel.org> <8c90cc3f-115e-4362-9293-05d9bee24214@linaro.org> <5d4edecf-51f3-4d4a-861f-fce419e3a314@oss.qualcomm.com> <20250927144757.4d36d5c8@jic23-huawei> Content-Language: en-US From: Jishnu Prakash In-Reply-To: <20250927144757.4d36d5c8@jic23-huawei> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=Hrl72kTS c=1 sm=1 tr=0 ts=68e08979 cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=EUspDBNiAAAA:8 a=u19HPSzwk6W4tZ9FH_gA:9 a=QEXdDO2ut3YA:10 a=IoOABgeZipijB_acs4fv:22 X-Proofpoint-GUID: 7_VsOoDANRpJV_wkL6iU0c9HRJOwmPWE X-Proofpoint-ORIG-GUID: 7_VsOoDANRpJV_wkL6iU0c9HRJOwmPWE X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDA0MDAwNCBTYWx0ZWRfX+Am4AjdzyDBf uQWPbVMyaRlCBGOVy9QU0Y9dZp7EIUH+pubU4gJmzX/Wr7F9P9fUCau/fsUdt7bv3RV0BehWOBJ Yl2tU/Fm/rI9dj5pUabAeNVkpodGwl2dhXH14ndMFwyUSATOC864r7K5VLP/dbOg19zRj4mHQTr BeJrzLI4q7FMqQz/SrLtPwwzaZLq545BYtF7ZClI/yK/xIwrdTs7rM8rBJwTt5A93RDFrAGKhH9 j71yyDmx7E9qgH168dEi3I5/2BRsnktogbtEdlHh/sjsfbIk/1L2Dv+6OvWk4B4U0NUQjrKkgYa T0ToJX2HLDR/gL5yb4o+DvwTZYjPrUJQzwFB7OzPyTl69KZ5cBieTfi33DYOX/myaFgljN+Jtcj F54G2TyrfQSxH4ayR0mAuNQO3DDaDA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-03_07,2025-10-02_03,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 phishscore=0 spamscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2509150000 definitions=main-2510040004 Hi Jonathan, On 9/27/2025 7:17 PM, Jonathan Cameron wrote: > On Fri, 19 Sep 2025 20:17:43 +0530 > Jishnu Prakash wrote: > >> Hi Krzysztof, >> >> On 9/18/2025 5:45 AM, Krzysztof Kozlowski wrote: >>> On 18/09/2025 04:47, Jishnu Prakash wrote: >>>> Hi Krzysztof, >>>> >>>> On 9/17/2025 5:59 AM, Krzysztof Kozlowski wrote: >>>>> On 16/09/2025 16:28, Jishnu Prakash wrote: >>>>>>> You cannot have empty spaces in ID constants. These are abstract >>>>>>> numbers. >>>>>>> >>>>>>> Otherwise please point me to driver using this constant. >>>>>> >>>>>> These constants are for ADC channel numbers, which are fixed in HW. >>>>>> >>>>>> They are used in this driver: drivers/iio/adc/qcom-spmi-adc5-gen3.c, >>>>>> which is added in patch 4 of this series. >>>>>> >>>>>> They can be found in the array named adc5_gen3_chans_pmic[]. >>>>> >>>>> Really? So point me to the line there using ADC5_GEN3_VREF_BAT_THERM. >>>>> >>>> >>>> We may not be using all of these channels right now - we can add them >>>> later based on requirements coming up. For now, I'll remove the channels >>>> not used in adc5_gen3_chans_pmic[]. >>> >>> You are not implementing the feedback then. Please read it carefully. >>> >> >> Sorry, I misunderstood - so you actually meant I should remove the >> empty spaces in the definitions, like this? >> >> -#define ADC5_GEN3_VREF_BAT_THERM 0x15 >> +#define ADC5_GEN3_VREF_BAT_THERM 0x15 >> >> I thought this at first, but I somehow doubted this later, as I saw some >> other recently added files with empty spaces in #define lines, like: >> >> include/dt-bindings/iio/adc/mediatek,mt6373-auxadc.h >> include/dt-bindings/regulator/st,stm32mp15-regulator.h >> >> I can make this change, if you prefer this. Please let me know >> if I'm still missing something. >> >> Also please let me know if you want me to remove the unused >> channels - I would prefer to keep them if there's no issue, >> as we might need them later. >> > He is referring to 0x14 and below not being defined values. So what > do they mean if they turn up in the DT? > Thanks for your clarification. To address your first point above, the macros added here only represent the ADC channel numbers which are supported for ADC5 Gen3 devices. If there are numbers missing in between (like 0x14), that is because there exist no valid ADC channels in HW matching those channel numbers. For your question above, if any of the undefined channels are used in the DT, they should ideally be treated as invalid when parsed in the driver probe and lead to an error. When I checked the code again, I saw we do not have such an explicit check right now, so I will add that in the next patch series. And to be clear on which channel numbers are supported, I think it may be best if, for now, we only add support for the channel numbers referenced in the array adc5_gen3_chans_pmic[] in drivers/iio/adc/qcom-spmi-adc5-gen3.c. There are only 18 channel numbers used in this array and I would remove all channels except for these from the binding files. During parsing, we would use this array to confirm if an ADC channel added in DT is supported. In case we need to add support for any more channels later, we could add their macros in the binding file and update the array correspondingly at that time. Does all this sound fine? Please let me know if you have any more concerns or queries. Thanks, Jishnu > Hence the request for context on how this define is being used so that > you can get some feedback on how it should be done. > > J >> Thanks, >> Jishnu >> >>> Best regards, >>> Krzysztof >> >