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[175.34.8.244]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cc4f4e5aa58sm505037a12.8.2026.09.13.23.35.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 13 Sep 2026 23:35:55 -0700 (PDT) Message-ID: Date: Mon, 14 Sep 2026 16:35:48 +1000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm_mpam: resctrl: Catch and propagate error from get_cpu_cacheinfo_id() To: Yin Li , Andre Przywara , James Morse , Ben Horgan Cc: Reinette Chatre , Fenghua Yu , Tony Luck , Dave Martin , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20260902143757.3469690-1-andre.przywara@arm.com> <095ebf41-e3c1-4e7e-b6f9-84b6f94da3ce@redhat.com> <7c6b728a-38e8-41d0-b99e-85a09a79a0b1@oss.qualcomm.com> Content-Language: en-US From: Gavin Shan In-Reply-To: <7c6b728a-38e8-41d0-b99e-85a09a79a0b1@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi Yin, On 9/14/26 4:25 PM, Yin Li wrote: > On 9/14/2026 2:14 PM, Gavin Shan wrote: >> On 9/3/26 12:37 AM, Andre Przywara wrote: >>> get_cpu_cacheinfo_id() can fail, in which case it returns a negative >>> error value. >>> >>> Check the returned value for this error condition, before passing the >>> value on to other code, which would hide the negative number in some high >>> value in the unsigned type. >>> >>> Fixes: 36528c7681b8 ("arm_mpam: resctrl: Add support for 'MB' resource") >>> Signed-off-by: Andre Przywara >>> --- >>>   drivers/resctrl/mpam_resctrl.c | 5 ++++- >>>   1 file changed, 4 insertions(+), 1 deletion(-) >>> >> >> Reviewed-by: Gavin Shan >> >>> diff --git a/drivers/resctrl/mpam_resctrl.c b/drivers/resctrl/ mpam_resctrl.c >>> index 9d223057953ab..a5e661eff86d7 100644 >>> --- a/drivers/resctrl/mpam_resctrl.c >>> +++ b/drivers/resctrl/mpam_resctrl.c >>> @@ -786,7 +786,10 @@ static u32 get_mba_min(struct mpam_props *cprops) >>>   /* Find the L3 cache that has affinity with this CPU */ >>>   static int find_l3_equivalent_bitmask(int cpu, cpumask_var_t tmp_cpumask) >>>   { >>> -    u32 cache_id = get_cpu_cacheinfo_id(cpu, 3); >>> +    int cache_id = get_cpu_cacheinfo_id(cpu, 3); >>> + >>> +    if (cache_id < 0) >>> +        return -ENOENT; >>>       lockdep_assert_cpus_held(); >> >> find_l3_equivalent_bitmask() passes @cache_id to find_l3_equivalent_bitmask() as >> a 'unsigned long' argument. Actually, it can be 'u32'. It's not directly related >> to this patch though. >> >> int mpam_get_cpumask_from_cache_id(unsigned long cache_id, ...); >> >> can be: >> >> int mpam_get_cpumask_from_cache_id(u32 cache_id, ...); >> > > Hi Gavin, > > Thanks for pointing this out. I've made exactly this change in my MPAM > DT series (v2, in preparation) — mpam_get_cpumask_from_cache_id() is > changed from unsigned long to u32 there, along with the related cache-id > variables. > https://lore.kernel.org/all/20260811-mpam-resctrl-dt-knp-support-v1-6-ea6397bead59@oss.qualcomm.com/ > > I'm about to post v2 of that series and will make sure you're on Cc, in > case you'd like to take a look. > Thanks for head-up, please keep me on the cc list. I would like to review if I get bandwidth, but no promise :) I noticed RFCv1 series of DT support for MPAM was posted to linux-kernel@vger.kernel.org instead of linux-arm-kernel@lists.infradead.org. Since MPAM is a arm64 feature, it's reasonable to post the patches to linux-arm-kernel@lists.infradead.org at the same time. MAINTAINERS doesn't indicates a maillist for MPAM patches in section "MPAM DRIVER". I guess it would be something worthy to be added. Thanks, Gavin