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On > controllers with HS support, this mixes HS timings with the clock divisor > calculation and sets an incorrect clock rate. > > Calculate the clock multiplier before the HS register setup overwrites > the selected non-HS timings. > > Fixes: 978b3ccbbac3 ("i2c: tegra: Add HS mode support") > Signed-off-by: Akhil R > --- > drivers/i2c/busses/i2c-tegra.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c > index 76d21bc51c618..6a98432734d37 100644 > --- a/drivers/i2c/busses/i2c-tegra.c > +++ b/drivers/i2c/busses/i2c-tegra.c > @@ -976,6 +976,8 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) > if (i2c_dev->hw->has_interface_timing_reg && tsu_thd) > i2c_writel(i2c_dev, tsu_thd, i2c_dev->hw->regs->interface_timing_1); > > + clk_multiplier = (tlow + thigh + 2) * (non_hs_mode + 1); > + > /* Write HS mode registers. These will get used only for HS mode*/ > if (i2c_dev->hw->enable_hs_mode_support) { > tlow = i2c_dev->hw->tlow_hs_mode; > @@ -988,8 +990,6 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) > i2c_writel(i2c_dev, tsu_thd, i2c_dev->hw->regs->hs_interface_timing_1); > } > > - clk_multiplier = (tlow + thigh + 2) * (non_hs_mode + 1); > - > err = clk_set_rate(i2c_dev->div_clk, > t->bus_freq_hz * clk_multiplier); > if (err) { > > base-commit: 7649ba73f9e7e1e04d0b46213e39c79ae09dd55c Reviewed-by: Jon Hunter Thanks! Jon -- nvpublic