From: evon.chiam@altera.com
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Dinh Nguyen <dinguyen@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: Lothar Rubusch <l.rubusch@gmail.com>,
Ng Tze Yee <tzeyee.ng@altera.com>,
Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com>,
Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>,
Brian Masney <bmasney@redhat.com>,
devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 4/5] arm64: dts: altera: move Agilex72 DT and use altr prefix
Date: Thu, 6 Aug 2026 17:25:04 +0800 [thread overview]
Message-ID: <a3de82b47b6b7638159d19c87da1e99e93fe2e7e.1786006669.git.evon.chiam@altera.com> (raw)
In-Reply-To: <cover.1786006669.git.evon.chiam@altera.com>
From: "Chiam, Evon" <evon.chiam@altera.com>
Move the Agilex72 SoC and SoCDK device trees from dts/intel to
dts/altera. Update the board and SoC compatible strings to use
the "altr" vendor.
Signed-off-by: Chiam, Evon <evon.chiam@altera.com>
---
arch/arm64/boot/dts/altera/Makefile | 3 ++-
arch/arm64/boot/dts/{intel => altera}/socfpga_agilex72.dtsi | 2 +-
.../boot/dts/{intel => altera}/socfpga_agilex72_socdk.dts | 2 +-
arch/arm64/boot/dts/intel/Makefile | 1 -
4 files changed, 4 insertions(+), 4 deletions(-)
rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex72.dtsi (98%)
rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex72_socdk.dts (84%)
diff --git a/arch/arm64/boot/dts/altera/Makefile b/arch/arm64/boot/dts/altera/Makefile
index 540bb5ae746b..a1a9ccba5334 100644
--- a/arch/arm64/boot/dts/altera/Makefile
+++ b/arch/arm64/boot/dts/altera/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-only
-dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_stratix10_socdk.dtb \
+dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex72_socdk.dtb \
+ socfpga_stratix10_socdk.dtb \
socfpga_stratix10_socdk_emmc.dtb \
socfpga_stratix10_socdk_nand.dtb \
socfpga_stratix10_swvp.dtb
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex72.dtsi b/arch/arm64/boot/dts/altera/socfpga_agilex72.dtsi
similarity index 98%
rename from arch/arm64/boot/dts/intel/socfpga_agilex72.dtsi
rename to arch/arm64/boot/dts/altera/socfpga_agilex72.dtsi
index c29c2afcaab7..354c775f577b 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex72.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_agilex72.dtsi
@@ -7,7 +7,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
/ {
- compatible = "intel,socfpga-agilex72";
+ compatible = "altr,socfpga-agilex72";
#address-cells = <2>;
#size-cells = <2>;
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex72_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_agilex72_socdk.dts
similarity index 84%
rename from arch/arm64/boot/dts/intel/socfpga_agilex72_socdk.dts
rename to arch/arm64/boot/dts/altera/socfpga_agilex72_socdk.dts
index 998f19f492b3..0959850cff66 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex72_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_agilex72_socdk.dts
@@ -6,7 +6,7 @@
/ {
model = "Altera SoCFPGA Agilex72 SoCDK";
- compatible = "intel,socfpga-agilex72-socdk", "intel,socfpga-agilex72";
+ compatible = "altr,socfpga-agilex72-socdk", "altr,socfpga-agilex72";
aliases {
serial0 = &uart0;
diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile
index 270c70fdf084..088a03b89c99 100644
--- a/arch/arm64/boot/dts/intel/Makefile
+++ b/arch/arm64/boot/dts/intel/Makefile
@@ -8,7 +8,6 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \
socfpga_agilex5_socdk_013b.dtb \
socfpga_agilex5_socdk_modular.dtb \
socfpga_agilex5_socdk_nand.dtb \
- socfpga_agilex72_socdk.dtb \
socfpga_agilex7m_socdk.dtb \
socfpga_n5x_socdk.dtb
dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb
--
2.43.7
next prev parent reply other threads:[~2026-08-06 9:25 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-06 9:25 [PATCH 0/5] clk: socfpga: add Agilex72 clock manager support evon.chiam
2026-08-06 9:25 ` [PATCH 1/5] dt-bindings: arm: altera: fix Agilex72 compatible vendor prefix evon.chiam
2026-08-12 2:49 ` Rob Herring
2026-08-14 8:18 ` Chiam, Evon
2026-08-14 17:35 ` Rob Herring
2026-08-18 8:19 ` Chiam, Evon
2026-08-18 15:13 ` Rob Herring
2026-08-06 9:25 ` [PATCH 2/5] dt-bindings: clock: altr,agilex72-clkmgr: add Agilex72 clock manager binding evon.chiam
2026-08-18 8:23 ` Krzysztof Kozlowski
2026-09-04 9:48 ` Chiam, Evon
2026-08-06 9:25 ` [PATCH 3/5] clk: socfpga: agilex72: add clock manager driver for Agilex72 evon.chiam
2026-08-10 17:42 ` Brian Masney
2026-09-02 10:26 ` Chiam, Evon
2026-08-27 14:38 ` Dinh Nguyen
2026-09-02 10:32 ` Chiam, Evon
2026-08-06 9:25 ` evon.chiam [this message]
2026-08-18 8:27 ` [PATCH 4/5] arm64: dts: altera: move Agilex72 DT and use altr prefix Krzysztof Kozlowski
2026-09-04 9:49 ` Chiam, Evon
2026-08-06 9:25 ` [PATCH 5/5] arm64: dts: altera: agilex72: add clock manager support evon.chiam
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