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From: Conor Dooley <mail@conchuod.ie>
To: Christophe JAILLET <christophe.jaillet@wanadoo.fr>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Conor Dooley <conor.dooley@microchip.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Daire McNamara <daire.mcnamara@microchip.com>,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org
Subject: Re: [RFC 3/6] clk: microchip: mpfs: add reset controller
Date: Sun, 19 Jun 2022 18:58:32 +0100	[thread overview]
Message-ID: <a45b0d2f-6550-3352-68c7-450dc7be8cd2@conchuod.ie> (raw)
In-Reply-To: <19bcf5cb-e291-2c18-b006-f4e9e7adac92@wanadoo.fr>


On 19/06/2022 18:19, Christophe JAILLET wrote:
> Le 19/06/2022 à 18:49, Conor Dooley a écrit :
>> From: Conor Dooley <conor.dooley@microchip.com>
>>
>> Add a reset controller to PolarFire SoC's clock driver. This reset
>> controller is registered as an aux device and read/write functions
>> exported to the drivers namespace so that the reset controller can
>> access the peripheral device reset register.
>>
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> 
> [...]
> 
>> +static void mpfs_reset_adev_release(struct device *dev)
>> +{
>> +    struct auxiliary_device *adev = to_auxiliary_dev(dev);
>> +
>> +    auxiliary_device_uninit(adev);
>> +
>> +    kfree(adev->name);
> 
> ?
> 
> Below we have:
>     adev->name = "reset-mpfs";

Aye, good spot thanks.
Was a hangover from me trying to figure out the auxiliary device
naming scheme.
Conor.

> 
> 
>> +    kfree(adev);
>> +}
>> +
>> +static struct auxiliary_device *mpfs_reset_adev_alloc(struct mpfs_clock_data *clk_data)
>> +{
>> +    struct auxiliary_device *adev;
>> +    int ret;
>> +
>> +    adev = kzalloc(sizeof(*adev), GFP_KERNEL);
>> +    if (!adev)
>> +        return ERR_PTR(-ENOMEM);
>> +
>> +    adev->name = "reset-mpfs";
>> +    adev->dev.parent = clk_data->dev;
>> +    adev->dev.release = mpfs_reset_adev_release;
>> +    adev->id = 666u;
>> +
>> +    ret = auxiliary_device_init(adev);
>> +    if (ret) {
>> +        kfree(adev);
>> +        return ERR_PTR(ret);
>> +    }
>> +
>> +    return adev;
>> +}
> 
> [...]

  reply	other threads:[~2022-06-19 17:58 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-19 16:49 [RFC 0/6] PolarFire SoC Reset controller Conor Dooley
2022-06-19 16:49 ` [RFC 1/6] dt-bindings: clk: microchip: mpfs: add reset controller support Conor Dooley
2022-06-19 16:49 ` [RFC 2/6] dt-bindings: net: cdns,macb: document polarfire soc's macb Conor Dooley
2022-06-19 16:49 ` [RFC 3/6] clk: microchip: mpfs: add reset controller Conor Dooley
2022-06-19 17:19   ` Christophe JAILLET
2022-06-19 17:58     ` Conor Dooley [this message]
2022-06-19 16:49 ` [RFC 4/6] reset: add polarfire soc reset support Conor Dooley
2022-06-19 19:06   ` Conor Dooley
2022-06-19 16:49 ` [RFC 5/6] net: macb: " Conor Dooley
2022-06-19 16:49 ` [RFC 6/6] riscv: dts: microchip: add mpfs specific macb " Conor Dooley

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