From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62D5AEB64DC for ; Thu, 20 Jul 2023 12:08:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231417AbjGTMI4 (ORCPT ); Thu, 20 Jul 2023 08:08:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229774AbjGTMIy (ORCPT ); Thu, 20 Jul 2023 08:08:54 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 21C22268F; Thu, 20 Jul 2023 05:08:51 -0700 (PDT) Received: from [192.168.1.100] (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 9D0836607085; Thu, 20 Jul 2023 13:08:48 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1689854929; bh=SgDyjdxIshyausnLbV7eqEbnWRDjrZQeUuWRlVZS+wc=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=J0PwYIF8/wDumfdHdqTHrUB+mYUH6hZvjs99V5ljNR0EypKgTLtTpcAUKQicgRamj I+A2m+5+EOymq6XVYOjjhjNPatTq+kwWQCxbjhgQOYCyoy7X+2pR3EqFgash6CSXv8 fO0xB3wNtkMqADUs9847hBs3tSwgCKR0LZ5IJeorqLXgxKaxtOgopJTodFBvMJ0Trf 8tsVocYpmZ55WYwUpsD5MRGabhKNT+QHqKq8tCEOHN7t2STXzHUxGl2/56yT+B8pZV y/PbbcmSl/mTrgEHcltZTZIQITJhpMNE96HNpMFGtcI9dM02D+nTDgqmSeYEsj5IQJ Zpu15BHWe6uOQ== Message-ID: Date: Thu, 20 Jul 2023 14:08:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH v3,3/3] drm/mediatek: dp: Add the audio divider to mtk_dp_data struct Content-Language: en-US To: Alexandre Mergnat , Shuijing Li , chunkuang.hu@kernel.org, p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, matthias.bgg@gmail.com, jitao.shi@mediatek.com Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Project_Global_Chrome_Upstream_Group@mediatek.com References: <20230720082604.18618-1-shuijing.li@mediatek.com> <20230720082604.18618-4-shuijing.li@mediatek.com> <44cc9cc5-7dce-f7a2-f077-b62d7851ee12@baylibre.com> <65da6005-3c07-a7ea-6b63-db45c8915ae8@collabora.com> <6c3422e8-4e2e-ba3a-4f30-d24308ef7c2a@baylibre.com> From: AngeloGioacchino Del Regno In-Reply-To: <6c3422e8-4e2e-ba3a-4f30-d24308ef7c2a@baylibre.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Il 20/07/23 14:07, Alexandre Mergnat ha scritto: > > > On 20/07/2023 13:54, AngeloGioacchino Del Regno wrote: >> Il 20/07/23 12:14, Alexandre Mergnat ha scritto: >>> >>> >>> On 20/07/2023 10:26, Shuijing Li wrote: >>>> Due to the difference of HW, different dividers need to be set. >>>> >>>> Signed-off-by: Shuijing Li >>>> Signed-off-by: Jitao Shi >>>> --- >>>> Changes in v3: >>>> Separate these two things into two different patches. >>>> per suggestion from the previous thread: >>>> https://lore.kernel.org/lkml/e2ad22bcba31797f38a12a488d4246a01bf0cb2e.camel@mediatek.com/ >>>> Changes in v2: >>>> - change the variables' name to be more descriptive >>>> - add a comment that describes the function of mtk_dp_audio_sample_arrange >>>> - reduce indentation by doing the inverse check >>>> - add a definition of some bits >>>> - add support for mediatek, mt8188-edp-tx >>>> per suggestion from the previous thread: >>>> https://lore.kernel.org/lkml/ac0fcec9-a2fe-06cc-c727-189ef7babe9c@collabora.com/ >>>> --- >>>>   drivers/gpu/drm/mediatek/mtk_dp.c     | 7 ++++++- >>>>   drivers/gpu/drm/mediatek/mtk_dp_reg.h | 1 + >>>>   2 files changed, 7 insertions(+), 1 deletion(-) >>>> > ... >>>> b/drivers/gpu/drm/mediatek/mtk_dp_reg.h >>>> index f38d6ff12afe..6d7f0405867e 100644 >>>> --- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h >>>> +++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h >>>> @@ -162,6 +162,7 @@ >>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_2    (1 << 8) >>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_4    (2 << 8) >>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_8    (3 << 8) >>>> +#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2    (4 << 8) >>> >>> IMO, it's a bit weird to have SoC specific define in the generic header. >>> Are you sure this bit is only available for MT8188 ? >>> >> >> Eh, the P0_DIV2 bit is 5<<8 for MT8195, while for 8188 it's 4<<8, clearly :-) >> > > Ok then, to avoid this kind of issue for other SoCs in the future, is that make > sense for you to do a SoC specific header file beside the generic one? > For just one definition? That's a bit overkill :-) >>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2    (5 << 8) >>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_4    (6 << 8) >>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_8    (7 << 8) >>> >>> Reviewed-by: Alexandre Mergnat >>> >> >> >