From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A3CCC433F5 for ; Mon, 9 May 2022 13:24:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235825AbiEIN2A (ORCPT ); Mon, 9 May 2022 09:28:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40434 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235996AbiEIN0A (ORCPT ); Mon, 9 May 2022 09:26:00 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B69E714FC92; Mon, 9 May 2022 06:21:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1652102511; x=1683638511; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=8BssW2vt86Or5YZamPV4O++D2jwvrX19Ct/ALbFqDOg=; b=HGsa3uF+nJn5Vnnygjq/10LW12qzJbUIjs85Mxbobliupe5wGsgstLfr ZtJQZPawbkEV23ikQB5nfMni+5wry3zAmzo71PXWlLpPMtVhdqPP2GJL8 QzvAKghpgiCmIN9KEw8zh3Ms9qAEsh6hx/pJ9O7w4mkO0VeaF7/2azbjW 8=; Received: from unknown (HELO ironmsg05-sd.qualcomm.com) ([10.53.140.145]) by alexa-out-sd-01.qualcomm.com with ESMTP; 09 May 2022 06:21:50 -0700 X-QCInternal: smtphost Received: from unknown (HELO nasanex01a.na.qualcomm.com) ([10.52.223.231]) by ironmsg05-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 May 2022 06:21:49 -0700 Received: from [10.242.59.11] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 9 May 2022 06:21:46 -0700 Message-ID: Date: Mon, 9 May 2022 18:51:43 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH V2] arm64: perf: Retain PMCR.X of PMCR_EL0 during reset Content-Language: en-US To: Will Deacon CC: , , , , , , , , , , References: <1651231749-19565-1-git-send-email-quic_c_spathi@quicinc.com> <20220506141213.GA23485@willie-the-truck> From: Srinivasarao Pathipati In-Reply-To: <20220506141213.GA23485@willie-the-truck> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Thanks Will for reviewing patch We are seeing issue at early boot up , so we will make this configurable with kernel arguments and push On 5/6/2022 7:42 PM, Will Deacon wrote: > Changes since V1: > - Preserving only PMCR_X bit as per Robin Murphy's comment