From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2BC35C4167D for ; Mon, 6 Nov 2023 08:25:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231164AbjKFIZk (ORCPT ); Mon, 6 Nov 2023 03:25:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229563AbjKFIZi (ORCPT ); Mon, 6 Nov 2023 03:25:38 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9E321BB; Mon, 6 Nov 2023 00:25:35 -0800 (PST) Received: from [100.107.97.3] (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 38CA46605769; Mon, 6 Nov 2023 08:25:33 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1699259134; bh=Ut/U5kOAxO6gxFFmg+MrU8i15HKJJa8WFBDlN6E2YQc=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=jqOcc47zUCAnvPPGcHa3h+8Zy0KttpeazmkhFA1tK9/zMneD54wNl36JBclLgaqqh uUJkZsBAacSI0TjhgSIT2hLExGFJVkNvhQOnRNhXZVsk2p9fW4KbvXCZMj86C7g4eP jzeV9aDfOMmnvPKf95y/16+NNV4rVs21wuYXeIjM7ERYCr0GIt6a6Gk96I9Itudnbg GPiQT0tAcI6i46R6Sw5bVZ2iFUYMNMeu571W1LC91mdZoU4dx7Vz5rtAWOsMfY9Dhk smOy6JgIz+SlMhLe590OFdSkhCXIHVTccuJartFaQ320dAynVSxc7uA7hOvDZ5PRGI ftdftbTeLzl+g== Message-ID: Date: Mon, 6 Nov 2023 09:25:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 1/2] dt-bindings: PCI: mediatek-gen3: Add support for controlling power and reset Content-Language: en-US To: Jian Yang , Bjorn Helgaas , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Lorenzo Pieralisi , Matthias Brugger , Rob Herring , Jianjun Wang Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Project_Global_Chrome_Upstream_Group@mediatek.com, Chuanjia.Liu@mediatek.com, Jieyy.Yang@mediatek.com, Qizhong.Cheng@mediatek.com, Jianguo.Zhang@mediatek.com References: <20231106061220.21485-1-jian.yang@mediatek.com> <20231106061220.21485-2-jian.yang@mediatek.com> From: AngeloGioacchino Del Regno In-Reply-To: <20231106061220.21485-2-jian.yang@mediatek.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Il 06/11/23 07:12, Jian Yang ha scritto: > From: "jian.yang" > > Add new properties to support control power supplies and reset pin of > a downstream component. > > Signed-off-by: jian.yang Reviewed-by: AngeloGioacchino Del Regno