From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753634AbeDLWU3 (ORCPT ); Thu, 12 Apr 2018 18:20:29 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:40850 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752463AbeDLWU2 (ORCPT ); Thu, 12 Apr 2018 18:20:28 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 8BC1C60F90 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org Subject: Re: [PATCH v3 2/2] MIPS: io: add a barrier after register read in readX() To: James Hogan Cc: linux-mips@linux-mips.org, arnd@arndb.de, timur@codeaurora.org, sulrich@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Ralf Baechle , Paul Burton , linux-kernel@vger.kernel.org References: <1522760109-16497-1-git-send-email-okaya@codeaurora.org> <1522760109-16497-2-git-send-email-okaya@codeaurora.org> <20180412215149.GA27802@saruman> From: Sinan Kaya Message-ID: Date: Thu, 12 Apr 2018 18:20:16 -0400 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20180412215149.GA27802@saruman> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 4/12/2018 5:51 PM, James Hogan wrote: > But why don't we always use wmb() in the writeX() case? Might not the > cached write to DMA buffer be reordered with the uncached write to MMIO > register from the coherent DMA point of view? I'm waiting on feedback > from MIPS hardware folk on this topic. Are you asking about this? #if defined(CONFIG_CPU_CAVIUM_OCTEON) || defined(CONFIG_LOONGSON3_ENHANCEMENT) #define war_io_reorder_wmb() wmb() #else -#define war_io_reorder_wmb() do { } while (0) +#define war_io_reorder_wmb() barrier() #endif There is a write barrier in writeX() but seem to be different from platform to platform. I'm not familiar with the MIPS architecture. We can always use a wmb() but it could hurt performance where it is not needed. This is the kind of input we need from the MIPS folks if compiler barrier is enough or we need a wmb() for all cases. -- Sinan Kaya Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.