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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=St6gLvO0 c=1 sm=1 tr=0 ts=6a2814d0 cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=ZVpGCM6XPQlVWg26268A:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 X-Proofpoint-ORIG-GUID: Sz-rOD3xW5mHrD7X_GbnBjvvx1ZZPrz- X-Proofpoint-GUID: Sz-rOD3xW5mHrD7X_GbnBjvvx1ZZPrz- X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA5MDEyNyBTYWx0ZWRfX/qLhzNSTqqL+ m6jsF7EhTZwiIaKRYaH0h5JwOmpMcOMyJW5N7bRqKEcJwHqigXjm2Erfoz5PpVMtEp2Rps6PsaC Rjywgx99P1T4z3mm8b3fAcohbrpddV4Ze09hPWos6aykXHJpYNE5wYyAtlyOwpzS/yhXAHKByIY 1AzoG/eE8mjxs+olQU2ZN7iLzxdNU9r0bkKpgRa+McxdAAcqVc8Hn7dNTZQy/U4nBBWmjB2toKb FzNEcjbFfLZqNj0luLgRBH4F90KfZL8CDNqMaetaTX2dCx+sOo4bOQMsO9VAwTej+mBIyqOCXkk vM6K6CF485Vp8teBF2Hora2dRcR5Q4uWyHNTShXREYxKm6Q/Ki1D7eYQ9CBAVqfuPfJBgaekyPC KrZefVqfs7omHYXgAysWGTnas10FDmV1wB0E4k+eOPZ7C4ckHQ2aNtAtgsaewD08xNJt6kUWlP/ BFvHveGcRHJ87a9lZ4g== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-09_03,2026-06-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 malwarescore=0 suspectscore=0 adultscore=0 lowpriorityscore=0 clxscore=1015 spamscore=0 bulkscore=0 phishscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606090127 On 6/2/26 5:21 PM, Taniya Das wrote: > Add the gp_mn pin mux function to the TLMM pin controllers for the > QCS8300, SA8775P and SC7280 SoCs. This function exposes the GP M/N > divider clock output on a dedicated GPIO pin, allowing the clock signal > to be routed externally. > > - QCS8300: gpio32 > - SA8775P: gpio35 > - SC7280: gpio60 With the changes split into separate commits for each platform: Reviewed-by: Konrad Dybcio Konrad