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Thu, 10 Apr 2025 13:08:03 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 53AD82sZ000458 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 10 Apr 2025 13:08:02 GMT Received: from [10.50.31.123] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 10 Apr 2025 06:07:58 -0700 Message-ID: Date: Thu, 10 Apr 2025 18:37:55 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH v4 6/6] media: platform: qcom/iris: add sm8650 support Content-Language: en-US To: Vikash Garodia , , Abhinav Kumar , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel CC: , , , , "Bryan O'Donoghue" References: <20250409-topic-sm8x50-iris-v10-v4-0-40e411594285@linaro.org> <20250409-topic-sm8x50-iris-v10-v4-6-40e411594285@linaro.org> <36e25d6e-36de-fec6-e54d-0683503c7a09@quicinc.com> <1550c870-188e-4b41-b17c-2009cda41ffc@linaro.org> <8cade183-72ac-eac1-1a57-a9db37657fca@quicinc.com> From: Dikshita Agarwal In-Reply-To: <8cade183-72ac-eac1-1a57-a9db37657fca@quicinc.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=B5+50PtM c=1 sm=1 tr=0 ts=67f7c2b3 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=KKAkSRfTAAAA:8 a=lJxrbFA30pwzKi-l1BMA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: GnbwpN4eOcrEtBsttOEFznZx1SQuGQPH X-Proofpoint-ORIG-GUID: GnbwpN4eOcrEtBsttOEFznZx1SQuGQPH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-10_03,2025-04-08_04,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 suspectscore=0 malwarescore=0 bulkscore=0 phishscore=0 spamscore=0 priorityscore=1501 adultscore=0 impostorscore=0 lowpriorityscore=0 mlxscore=0 clxscore=1015 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504100095 On 4/10/2025 2:43 PM, Vikash Garodia wrote: > > On 4/10/2025 2:31 PM, Neil Armstrong wrote: >> On 09/04/2025 18:57, Vikash Garodia wrote: >>> Hi Neil, >>> >>> On 4/9/2025 8:08 PM, Neil Armstrong wrote: >>>> Add support for the SM8650 platform by re-using the SM8550 >>>> definitions and using the vpu33 ops. >>>> >>>> The SM8650/vpu33 requires more reset lines, but the H.264 >>>> decoder capabilities are identical. >>>> >>>> Tested-by: Bryan O'Donoghue # x1e Dell >>>> Signed-off-by: Neil Armstrong >>>> --- >>>>   .../platform/qcom/iris/iris_platform_common.h      |  1 + >>>>   .../platform/qcom/iris/iris_platform_sm8550.c      | 64 ++++++++++++++++++++++ >>>>   drivers/media/platform/qcom/iris/iris_probe.c      |  4 ++ >>>>   3 files changed, 69 insertions(+) >>>> >>>> diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h >>>> b/drivers/media/platform/qcom/iris/iris_platform_common.h >>>> index >>>> fdd40fd80178c4c66b37e392d07a0a62f492f108..6bc3a7975b04d612f6c89206eae95dac678695fc 100644 >>>> --- a/drivers/media/platform/qcom/iris/iris_platform_common.h >>>> +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h >>>> @@ -35,6 +35,7 @@ enum pipe_type { >>>>     extern struct iris_platform_data sm8250_data; >>>>   extern struct iris_platform_data sm8550_data; >>>> +extern struct iris_platform_data sm8650_data; >>>>     enum platform_clk_type { >>>>       IRIS_AXI_CLK, >>>> diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8550.c >>>> b/drivers/media/platform/qcom/iris/iris_platform_sm8550.c >>>> index >>>> 35d278996c430f2856d0fe59586930061a271c3e..d0f8fa960d53367023e41bc5807ba3f8beae2efc 100644 >>>> --- a/drivers/media/platform/qcom/iris/iris_platform_sm8550.c >>>> +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8550.c >>>> @@ -144,6 +144,10 @@ static const struct icc_info sm8550_icc_table[] = { >>>>     static const char * const sm8550_clk_reset_table[] = { "bus" }; >>>>   +static const char * const sm8650_clk_reset_table[] = { "bus", "core" }; >>>> + >>>> +static const char * const sm8650_controller_reset_table[] = { "xo" }; >>>> + >>>>   static const struct bw_info sm8550_bw_table_dec[] = { >>>>       { ((4096 * 2160) / 256) * 60, 1608000 }, >>>>       { ((4096 * 2160) / 256) * 30,  826000 }, >>>> @@ -264,3 +268,63 @@ struct iris_platform_data sm8550_data = { >>>>       .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, >>>>       .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), >>>>   }; >>>> + >>>> +/* >>>> + * Shares most of SM8550 data except: >>>> + * - vpu_ops to iris_vpu33_ops >>>> + * - clk_rst_tbl to sm8650_clk_reset_table >>>> + * - controller_rst_tbl to sm8650_controller_reset_table >>>> + * - fwname to "qcom/vpu/vpu33_p4.mbn" >>>> + */ >>>> +struct iris_platform_data sm8650_data = { >>>> +    .get_instance = iris_hfi_gen2_get_instance, >>>> +    .init_hfi_command_ops = iris_hfi_gen2_command_ops_init, >>>> +    .init_hfi_response_ops = iris_hfi_gen2_response_ops_init, >>>> +    .vpu_ops = &iris_vpu33_ops, >>>> +    .set_preset_registers = iris_set_sm8550_preset_registers, >>>> +    .icc_tbl = sm8550_icc_table, >>>> +    .icc_tbl_size = ARRAY_SIZE(sm8550_icc_table), >>>> +    .clk_rst_tbl = sm8650_clk_reset_table, >>>> +    .clk_rst_tbl_size = ARRAY_SIZE(sm8650_clk_reset_table), >>>> +    .controller_rst_tbl = sm8650_controller_reset_table, >>>> +    .controller_rst_tbl_size = ARRAY_SIZE(sm8650_controller_reset_table), >>>> +    .bw_tbl_dec = sm8550_bw_table_dec, >>>> +    .bw_tbl_dec_size = ARRAY_SIZE(sm8550_bw_table_dec), >>>> +    .pmdomain_tbl = sm8550_pmdomain_table, >>>> +    .pmdomain_tbl_size = ARRAY_SIZE(sm8550_pmdomain_table), >>>> +    .opp_pd_tbl = sm8550_opp_pd_table, >>>> +    .opp_pd_tbl_size = ARRAY_SIZE(sm8550_opp_pd_table), >>>> +    .clk_tbl = sm8550_clk_table, >>>> +    .clk_tbl_size = ARRAY_SIZE(sm8550_clk_table), >>>> +    /* Upper bound of DMA address range */ >>>> +    .dma_mask = 0xe0000000 - 1, >>>> +    .fwname = "qcom/vpu/vpu33_p4.mbn", >>>> +    .pas_id = IRIS_PAS_ID, >>>> +    .inst_caps = &platform_inst_cap_sm8550, >>>> +    .inst_fw_caps = inst_fw_cap_sm8550, >>>> +    .inst_fw_caps_size = ARRAY_SIZE(inst_fw_cap_sm8550), >>>> +    .tz_cp_config_data = &tz_cp_config_sm8550, >>>> +    .core_arch = VIDEO_ARCH_LX, >>>> +    .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE, >>>> +    .ubwc_config = &ubwc_config_sm8550, >>>> +    .num_vpp_pipe = 4, >>>> +    .max_session_count = 16, >>>> +    .max_core_mbpf = ((8192 * 4352) / 256) * 2, >>>> +    .input_config_params = >>>> +        sm8550_vdec_input_config_params, >>>> +    .input_config_params_size = >>>> +        ARRAY_SIZE(sm8550_vdec_input_config_params), >>>> +    .output_config_params = >>>> +        sm8550_vdec_output_config_params, >>>> +    .output_config_params_size = >>>> +        ARRAY_SIZE(sm8550_vdec_output_config_params), >>>> +    .dec_input_prop = sm8550_vdec_subscribe_input_properties, >>>> +    .dec_input_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_input_properties), >>>> +    .dec_output_prop = sm8550_vdec_subscribe_output_properties, >>>> +    .dec_output_prop_size = >>>> ARRAY_SIZE(sm8550_vdec_subscribe_output_properties), >>>> + >>>> +    .dec_ip_int_buf_tbl = sm8550_dec_ip_int_buf_tbl, >>>> +    .dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_ip_int_buf_tbl), >>>> +    .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, >>>> +    .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), >>>> +}; >>> While i was extending the data for QCS8300 (one another iris-v3 variant), i >>> realize that this file iris_platform_sm8550.c is getting dumped with all SOC >>> platform data. It would be a good idea at this point to split it into something >>> like this >>> 1. Introduce SOC specific c file and move the respective SOC platform data to >>> it, for ex, in this case sm8650_data >>> 2. Move the common structs from iris_platform_sm8550.c to >>> iris_platform_common.h. This way more SOCs getting added in future, can include >>> the common header to reuse them, otherwise it would end up using 8550.c for all >>> future SOC. >>> >>> Share your comments if you have any better approach to manage/re-use these >>> platform data considering more SOCs getting added. >> >> Right, yes the architecture is fine, but I don't feel iris_platform_common is >> the right >> place, perhaps we could introduce a platform_catalog.c where we could place all >> the common >> platform data and reuse them from the platform_.c files ? > Common structs would certainly need to be part of a header which can be > included. Where do you plan to keep common struct to be used across SOC specific > file in your approach ? >> >> I can design prototype on top of this patchset as an RFC. > I was thinking that the changes are not that big, and can be done in existing > series though. > For now, I think you can introduce a platform_sm8650.c as part of this series and use the common structure from platform_sm8550.c. Shouldn't be a big change. Later you can post a separate patch series to add platform_catalog.c and have common struct placed there which can be used across different SOC platform files. or other way is, Post a patch series to introduce platform_catalog.c with common struct and then rebase your 8650 series on top of it. Thanks, Dikshita > Thanks, > Vikash >> >> Neil >> >>> >>> Regards, >>> Vikash >>> >>>> diff --git a/drivers/media/platform/qcom/iris/iris_probe.c >>>> b/drivers/media/platform/qcom/iris/iris_probe.c >>>> index >>>> 4f8bce6e2002bffee4c93dcaaf6e52bf4e40992e..7cd8650fbe9c09598670530103e3d5edf32953e7 100644 >>>> --- a/drivers/media/platform/qcom/iris/iris_probe.c >>>> +++ b/drivers/media/platform/qcom/iris/iris_probe.c >>>> @@ -345,6 +345,10 @@ static const struct of_device_id iris_dt_match[] = { >>>>               .data = &sm8250_data, >>>>           }, >>>>   #endif >>>> +    { >>>> +        .compatible = "qcom,sm8650-iris", >>>> +        .data = &sm8650_data, >>>> +    }, >>>>       { }, >>>>   }; >>>>   MODULE_DEVICE_TABLE(of, iris_dt_match); >>>> >>