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Wed, 6 May 2020 14:21:42 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 6 May 2020 14:21:41 -0500 Received: from [10.250.100.73] (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 046JLbBp056569; Wed, 6 May 2020 14:21:39 -0500 Subject: Re: [PATCH v2 1/2] dt-bindings: soc: ti: add binding for k3 platforms chipid module To: Santosh Shilimkar , Rob Herring , Lokesh Vutla , CC: Dave Gerlach , Sekhar Nori , , , Tero Kristo , Nishanth Menon References: <20200505193417.2112-1-grygorii.strashko@ti.com> <20200505193417.2112-2-grygorii.strashko@ti.com> From: Grygorii Strashko Message-ID: Date: Wed, 6 May 2020 22:21:36 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <20200505193417.2112-2-grygorii.strashko@ti.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, On 05/05/2020 22:34, Grygorii Strashko wrote: > Add DT binding for Texas Instruments K3 Multicore SoC platforms chipid > module which is represented by CTRLMMR_xxx_JTAGID register and contains > information about SoC id and revision. > > Signed-off-by: Grygorii Strashko > Reviewed-by: Lokesh Vutla > --- > .../bindings/soc/ti/k3-socinfo.yaml | 40 +++++++++++++++++++ > 1 file changed, 40 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/ti/k3-socinfo.yaml > > diff --git a/Documentation/devicetree/bindings/soc/ti/k3-socinfo.yaml b/Documentation/devicetree/bindings/soc/ti/k3-socinfo.yaml > new file mode 100644 > index 000000000000..a1a8423b2e2e > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/ti/k3-socinfo.yaml > @@ -0,0 +1,40 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/ti/k3-socinfo.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Texas Instruments K3 Multicore SoC platforms chipid module > + > +maintainers: > + - Tero Kristo > + - Nishanth Menon > + > +description: | > + Texas Instruments (ARM64) K3 Multicore SoC platforms chipid module is > + represented by CTRLMMR_xxx_JTAGID register which contains information about > + SoC id and revision. > + > +properties: > + $nodename: > + pattern: "^chipid@[0-9a-f]+$" > + > + compatible: > + items: > + - const: ti,am654-chipid > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + chipid@43000014 { > + compatible = "ti,am654-chipid"; > + reg = <0x43000014 0x4>; > + }; > Rob, Do you have any comments here? -- Best regards, grygorii