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Tue, 29 Sep 2026 22:18:10 -0400 (EDT) Received: from ASHBMBX9.ad.analog.com (ASHBMBX9.ad.analog.com [10.64.17.10]) by nwd2mta4.analog.com (8.14.7/8.14.7) with ESMTP id 68U2I9D1047941 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 29 Sep 2026 22:18:09 -0400 Received: from ASHBMBX8.ad.analog.com (10.64.17.5) by ASHBMBX9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.37; Tue, 29 Sep 2026 22:18:09 -0400 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.2.1748.37 via Frontend Transport; Tue, 29 Sep 2026 22:18:09 -0400 Received: from JSANTO12-L01.ad.analog.com ([10.65.60.206]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 68U2Hq0h015851; Tue, 29 Sep 2026 22:17:55 -0400 From: Jonathan Santos To: , CC: Jonathan Santos , , , , , , , Dennis Heinzel Subject: [PATCH v2 1/2] spi: axi-spi-engine: fix stale SYNC IRQ pending Date: Tue, 29 Sep 2026 23:17:23 -0300 Message-ID: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTMwMDAwOCBTYWx0ZWRfXxbV7rM5SZstd jQPGVD0Q0kcqnRR7FwPRn2n9A0JhG/U0EDb+gmhf7etjdHJVbeFB6qidPZldMfF494JebWQFtM6 7hQZXdQeAEzVTWwncD7NW78CzG/KLo6M16nwT8kcBNhpKxezyavZ7GgOLMhpMqJcbV7/4HM7sE5 Crgq7SZ3sa9UmbL+Rcn050Zj3WISRPvo84IZlZC276/JfmCqjQhLi/4DXC9w1Ea3rDH6Agw5OMO XALIQDvylKqOsE+DTr2uPke30wBGJBieMbEhSUhBzWYErAKUMmKDtRvcWx5DZHS/gtSrs1xzARo NYJo67CjelTsda0heo5qD9A95GEoRhDlKZbgpInep5uA1fiNM+pfFmKi/X068jSFQOEmFIi0fN3 KBe0xQ5R4uJGSSZSJtwKCwWtWbt4O16GZ0cU3HMUdCdPA7FFcslf/3X9Xu6PwFOzRtZEIMXG/7L 6zZNYiqR/qUlzT1fGUg== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTMwMDAwOCBTYWx0ZWRfX9i3ievBWv4FW 0MmOuMHN4QAkh+loQHM6w7OjkTSx/Q5p4qWkNw+4sndMdjrkr1hZFleNQqKGRZku7V6RJQy2BAx HSwEQKC4eKA4fuJrsRStYtOcVer+Yyt3eOG3yFuzpzAlXOUkJ3gp X-Proofpoint-GUID: fWInXBAqYo-RNio-sAfDHmSiwlXacc0U X-Proofpoint-ORIG-GUID: fWInXBAqYo-RNio-sAfDHmSiwlXacc0U X-Authority-Analysis: v=2.4 cv=Eexd0/mC c=1 sm=1 tr=0 ts=6abc7162 cx=c_pps a=3WNzaoukacrqR9RwcOSAdA==:117 a=3WNzaoukacrqR9RwcOSAdA==:17 a=VdqzKS8jKosA:10 a=VkNPw1HP01LnGYTKEx00:22 a=0sLvza09kfJOxVLZPwjg:22 a=N--XFCr6TIEc_64PeIT2:22 a=gAnH3GRIAAAA:8 a=0GyDL0XGWyQrYU0KOQkA:9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-29_05,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 impostorscore=0 bulkscore=0 lowpriorityscore=0 phishscore=0 malwarescore=0 spamscore=0 clxscore=1015 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609300008 spi_engine_setup() sends a SYNC(1) command and polls SYNC_ID to confirm it was parsed by the FPGA, but never clears the corresponding interrupt pending bit (INT_PENDING[SYNC]). When the first real SPI transfer starts and INT_SYNC is enabled, that stale pending bit fires immediately, causing the IRQ handler to see the leftover SYNC_ID from setup, match it against the current transfer's ID, and prematurely signal completion before the hardware finishes. This race manifests at low SPI clock frequencies (~2-3 MHz), where the FPGA takes long enough to execute the transfer that handler is parsed before it finishes. At higher SCLK rates the transfer completes fast enough that the issue is masked. Fix this by clearing INT_PENDING[SYNC] after the polled SYNC, ensuring no stale interrupt is left pending. Reported-by: Dennis Heinzel Closes: https://ez.analog.com/linux-software-drivers/f/q-a/604145/axi-spi-engine-stale-sync-pending-can-complete-first-transfer-early-at-low-spi-clock-2-3-mhz Fixes: 1d0ee0c9df31 ("spi: axi-spi-engine: wait for completion in setup") Signed-off-by: Jonathan Santos --- drivers/spi/spi-axi-spi-engine.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-axi-spi-engine.c b/drivers/spi/spi-axi-spi-engine.c index 02bbc5d0cfc5..0de3af5c429c 100644 --- a/drivers/spi/spi-axi-spi-engine.c +++ b/drivers/spi/spi-axi-spi-engine.c @@ -887,6 +887,7 @@ static int spi_engine_setup(struct spi_device *device) struct spi_controller *host = device->controller; struct spi_engine *spi_engine = spi_controller_get_devdata(host); unsigned int reg; + int ret; if (device->mode & SPI_CS_HIGH) spi_engine->cs_inv |= BIT(spi_get_chipselect(device, 0)); @@ -922,8 +923,13 @@ static int spi_engine_setup(struct spi_device *device) writel_relaxed(SPI_ENGINE_CMD_SYNC(1), spi_engine->base + SPI_ENGINE_REG_CMD_FIFO); - return readl_relaxed_poll_timeout(spi_engine->base + SPI_ENGINE_REG_SYNC_ID, - reg, reg == 1, 1, 1000); + ret = readl_relaxed_poll_timeout(spi_engine->base + SPI_ENGINE_REG_SYNC_ID, + reg, reg == 1, 1, 1 * USEC_PER_MSEC); + + /* Clear the stale SYNC pending bit so it doesn't fire when the IRQ is later enabled */ + writel_relaxed(SPI_ENGINE_INT_SYNC, spi_engine->base + SPI_ENGINE_REG_INT_PENDING); + + return ret; } static int spi_engine_transfer_one_message(struct spi_controller *host, -- 2.34.1