From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19DB6ECAAD8 for ; Wed, 14 Sep 2022 02:24:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229502AbiINCYa (ORCPT ); Tue, 13 Sep 2022 22:24:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52766 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230160AbiINCYT (ORCPT ); Tue, 13 Sep 2022 22:24:19 -0400 Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 87E466CF47 for ; Tue, 13 Sep 2022 19:24:08 -0700 (PDT) Received: from dggemv704-chm.china.huawei.com (unknown [172.30.72.55]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4MS3tq02w7zNmCN; Wed, 14 Sep 2022 10:19:31 +0800 (CST) Received: from kwepemm600007.china.huawei.com (7.193.23.208) by dggemv704-chm.china.huawei.com (10.3.19.47) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Wed, 14 Sep 2022 10:24:06 +0800 Received: from [10.174.185.210] (10.174.185.210) by kwepemm600007.china.huawei.com (7.193.23.208) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31; Wed, 14 Sep 2022 10:24:05 +0800 Subject: Re: [PATCH] arm64: arch_timer: Fix the lack of set_next_event* for workaround of Cortex-A73 erratum 858921 To: Oliver Upton CC: Mark Rutland , Marc Zyngier , "Daniel Lezcano" , Thomas Gleixner , , , , References: <20220913104723.332-1-jiangkunkun@huawei.com> From: Kunkun Jiang Message-ID: Date: Wed, 14 Sep 2022 10:24:04 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-Originating-IP: [10.174.185.210] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To kwepemm600007.china.huawei.com (7.193.23.208) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Oliver, Thank you for your suggestion. I've modified it in v2. Thanks, Kunkun Jiang On 2022/9/13 19:26, Oliver Upton wrote: > On Tue, Sep 13, 2022 at 06:47:23PM +0800, Kunkun Jiang wrote: >> The patch a38b71b0833e moves the programming of the timers from > Please check your patch with scripts/checkpatch.pl next time. > Use this pattern when referring to a commit in the changelog: > > commit a38b71b0833e ("clocksource/drivers/arm_arch_timer: Move > system register timer programming over to CVAL") moved the > programming... > >> the countdown timer (TVAL) over to the comparator (CVAL). This >> makes it necessary to read the counter when setting next event. >> However, the workaround of Cortex-A73 erratum 858921 does not >> set the corresponding set_next_event_phys and set_next_event_virt. >> This patch fixes it. > Avoid referring to 'this patch', and just state imperatively what the > change does, perhaps: > > Add the appropriate hooks to apply the erratum mitigation when > programming the next timer event. > > Thanks for catching this! > > -- > Best, > Oliver > .