mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Aswath Govindraju <a-govindraju@ti.com>
To: Kishon Vijay Abraham I <kishon@ti.com>,
	Nishanth Menon <nm@ti.com>, Tero Kristo <kristo@kernel.org>,
	Rob Herring <robh+dt@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Lokesh Vutla <lokeshvutla@ti.com>
Subject: Re: [PATCH v4 0/5] AM64: EVM/SK: Enable PCIe and USB
Date: Mon, 7 Jun 2021 19:58:26 +0530	[thread overview]
Message-ID: <a5cefbed-9553-66e6-2d1f-684814dea4ce@ti.com> (raw)
In-Reply-To: <20210603142251.14563-1-kishon@ti.com>

On 03/06/21 7:52 pm, Kishon Vijay Abraham I wrote:
> AM642 EVM has one PCIe slot (no USB slot) and AM642 SK has one USB slot
> (no PCIe slot).
> AM64 SoC has one SERDES module which can be used by either PCIe or USB.
> 
> Add DT nodes to represent and enable SERDES/PCIe/USB modules in EVM/SK.
> 
> Changes from v3:
> 1) Limit the lines to < 100
> 
> Changes from v2:
> 1) Dropped "dt-bindings: mux: Convert reg-mux DT bindings to YAML" as
> it's handled by a different series from Rob
> 2) Rename "mux" DT node to a standard "mux-controller" DT node.
> 
> Changes from v1:
> 1) Add a patch to convert reg-mux DT bindings to YAML
> 2) Use generic names for clock node names
> 3) Remove redundant status = "okay" for serdes_wiz0
> 
> v1: http://lore.kernel.org/r/20210512150107.26793-1-kishon@ti.com
> v2: http://lore.kernel.org/r/20210517061739.5762-1-kishon@ti.com
> v3: http://lore.kernel.org/r/20210526142921.12127-1-kishon@ti.com
> 

For the whole series,

Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>

Thanks,
Aswath

> Kishon Vijay Abraham I (5):
>   arm64: dts: ti: k3-am64-main: Add SERDES DT node
>   arm64: dts: ti: k3-am64-main: Add PCIe DT node
>   arm64: dts: ti: k3-am642-evm: Enable PCIe and SERDES
>   arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port
>   arm64: dts: ti: k3-am642-sk: Disable PCIe
> 
>  arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 107 +++++++++++++++++++++++
>  arch/arm64/boot/dts/ti/k3-am642-evm.dts  |  30 +++++++
>  arch/arm64/boot/dts/ti/k3-am642-sk.dts   |  43 +++++++++
>  3 files changed, 180 insertions(+)
> 


  parent reply	other threads:[~2021-06-07 14:28 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-03 14:22 Kishon Vijay Abraham I
2021-06-03 14:22 ` [PATCH v4 1/5] arm64: dts: ti: k3-am64-main: Add SERDES DT node Kishon Vijay Abraham I
2021-06-03 14:22 ` [PATCH v4 2/5] arm64: dts: ti: k3-am64-main: Add PCIe " Kishon Vijay Abraham I
2021-06-03 14:22 ` [PATCH v4 3/5] arm64: dts: ti: k3-am642-evm: Enable PCIe and SERDES Kishon Vijay Abraham I
2021-06-03 14:22 ` [PATCH v4 4/5] arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port Kishon Vijay Abraham I
2021-06-03 14:22 ` [PATCH v4 5/5] arm64: dts: ti: k3-am642-sk: Disable PCIe Kishon Vijay Abraham I
2021-06-07 14:28 ` Aswath Govindraju [this message]
2021-06-08 14:38 ` [PATCH v4 0/5] AM64: EVM/SK: Enable PCIe and USB Nishanth Menon

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=a5cefbed-9553-66e6-2d1f-684814dea4ce@ti.com \
    --to=a-govindraju@ti.com \
    --cc=devicetree@vger.kernel.org \
    --cc=kishon@ti.com \
    --cc=kristo@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=lokeshvutla@ti.com \
    --cc=nm@ti.com \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®