From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 81665279DCA for ; Tue, 10 Mar 2026 21:08:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.118.77.11 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773176930; cv=none; b=CCEWGxPE4Rs51vXPKzQVis+jhVOceDMS4hxXFatTjT3jWo3ihoTLPN0ZOKsMg+yldaDAivAmS0M6r+EqZyX3/HmTSPFBFuFwVpHLRBRjT21k9kALHkDStQLZdrDaoCvkV58Thx2UdOzPp4mttWE5iJ9nB88Vyggk/l8MWIyBSyk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773176930; c=relaxed/simple; bh=SxvFwt6RNoWEPsMfWZcfBn5YT6mZDJktqM19xKBdhV8=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:From:In-Reply-To: Content-Type:References; b=tC8ezyuWPXywcGZGqXpeoAandp7KPNjlT1JcYZWu1IsF2UvkTdD96FThI9jyTTdj3LvB3nG0PqfbPi5ZYtyNl6aakDi3G/EO1UbcMCwEXJm6219KgTZMgK58MMm1dlXAClNiZwyJs57En5r6Z3+7TKktRxSM4xyaMF/D7Jb2ii0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=eZ8XyXaP; arc=none smtp.client-ip=210.118.77.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="eZ8XyXaP" Received: from eucas1p2.samsung.com (unknown [182.198.249.207]) by mailout1.w1.samsung.com (KnoxPortal) with ESMTP id 20260310210841euoutp01f70035cb8535179c72e4f73c469875de~blwPiwq5y1817018170euoutp01B for ; Tue, 10 Mar 2026 21:08:41 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout1.w1.samsung.com 20260310210841euoutp01f70035cb8535179c72e4f73c469875de~blwPiwq5y1817018170euoutp01B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1773176921; bh=tGKcv9KXSZ8NeZkMwYhCoqHzYQKa6iNvw2bZS+J/rzE=; h=Date:Subject:To:Cc:From:In-Reply-To:References:From; b=eZ8XyXaPRQAjrmD4tNZ3xUXMKKEX3h1oOCD4TsFqZXdYBieeyb/LtVoxH2f21WRDs FseqmW6UqV5Wnori+EXSWkMHCW3pnM/7xRBu1chhgHxCLymTyDSRwFQpU7xFOprv5y rxzqJwl64rsea6rmb5pyIdwHoZqCHAqngy2W2YQE= Received: from eusmtip1.samsung.com (unknown [203.254.199.221]) by eucas1p2.samsung.com (KnoxPortal) with ESMTPA id 20260310210840eucas1p2dc0fce312c0fe458cd71faffb303d0a6~blwPOKs7r3236232362eucas1p2y; Tue, 10 Mar 2026 21:08:40 +0000 (GMT) Received: from [106.210.134.192] (unknown [106.210.134.192]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20260310210839eusmtip17c631ae9b4a7af8f06cd5dfe1f3e6b7d~blwNydyN01109311093eusmtip1E; Tue, 10 Mar 2026 21:08:39 +0000 (GMT) Message-ID: Date: Tue, 10 Mar 2026 22:08:38 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Betterbird (Windows) Subject: Re: [PATCH 2/3] dma-mapping: Clarify valid conditions for CPU cache line overlap To: Jason Gunthorpe Cc: Leon Romanovsky , Robin Murphy , "Michael S. Tsirkin" , Petr Tesarik , Jonathan Corbet , Shuah Khan , Jason Wang , Xuan Zhuo , =?UTF-8?Q?Eugenio_P=C3=A9rez?= , iommu@lists.linux.dev, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, virtualization@lists.linux.dev, linux-rdma@vger.kernel.org Content-Language: en-US From: Marek Szyprowski In-Reply-To: <20260310123405.GR1687929@ziepe.ca> Content-Transfer-Encoding: 7bit X-CMS-MailID: 20260310210840eucas1p2dc0fce312c0fe458cd71faffb303d0a6 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-RootMTR: 20260309090352eucas1p283a75c78cac495b5ad87df74c79aab07 X-EPHeader: CA X-CMS-RootMailID: 20260309090352eucas1p283a75c78cac495b5ad87df74c79aab07 References: <20260307-dma-debug-overlap-v1-2-c034c38872af@nvidia.com> <20260308181920.GH1687929@ziepe.ca> <20260308184902.GR12611@unreal> <20260308230916.GI1687929@ziepe.ca> <20260309090342.GS12611@unreal> <20260309150502.GX12611@unreal> <20260309151356.GN1687929@ziepe.ca> <20260310123405.GR1687929@ziepe.ca> On 10.03.2026 13:34, Jason Gunthorpe wrote: > On Tue, Mar 10, 2026 at 10:45:38AM +0100, Marek Szyprowski wrote: >> Jason is right. Indeed the rdma/uverbs case needs some extension to >> ensure that the coherent mapping is used, what is not possible now. This >> however doesn't mean that the DMA_ATTR_CPU_CACHE_OVERLAP is not needed >> for that use case too. I'm open to accept both. The only question I have >> is which name should we use? We already have DMA_ATTR_CPU_CACHE_CLEAN, >> while DMA_ATTR_CPU_CACHE_OVERLAP and >> DMA_ATTR_DEBUGGING_IGNORE_CACHELINES were proposed here. The last seems >> to be most descriptive. > If we do DMA_ATTR_REQUIRE_COHERENCE then I imagine it would internally > also set DMA_ATTR_DEBUGGING_IGNORE_CACHELINES, but I'd prefer that > detail not leak into the callers. Why DMA_ATTR_REQUIRE_COHERENCE should imply DMA_ATTR_DEBUGGING_IGNORE_CACHELINES? Best regards -- Marek Szyprowski, PhD Samsung R&D Institute Poland