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Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.5.1 Subject: Re: [REPOST PATCH v4 04/13] drm/msm/disp/dpu1: Add support for DSC in pingpong block Content-Language: en-US To: Vinod Koul , Rob Clark CC: , Bjorn Andersson , David Airlie , Daniel Vetter , Jonathan Marek , Dmitry Baryshkov , Abhinav Kumar , , , References: <20220210103423.271016-1-vkoul@kernel.org> <20220210103423.271016-5-vkoul@kernel.org> From: Abhinav Kumar In-Reply-To: <20220210103423.271016-5-vkoul@kernel.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/10/2022 2:34 AM, Vinod Koul wrote: > In SDM845, DSC can be enabled by writing to pingpong block registers, so > add support for DSC in hw_pp > > Reviewed-by: Abhinav Kumar For the sake of uniformity, please use Reviewed-by: Abhinav Kumar > Reviewed-by: Dmitry Baryshkov > Signed-off-by: Vinod Koul > --- > .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 +++++++++++++++++++ > .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 14 ++++++++ > 2 files changed, 46 insertions(+) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c > index 55766c97c4c8..47c6ab6caf95 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c > @@ -28,6 +28,9 @@ > #define PP_FBC_MODE 0x034 > #define PP_FBC_BUDGET_CTL 0x038 > #define PP_FBC_LOSSY_MODE 0x03C > +#define PP_DSC_MODE 0x0a0 > +#define PP_DCE_DATA_IN_SWAP 0x0ac > +#define PP_DCE_DATA_OUT_SWAP 0x0c8 > > #define PP_DITHER_EN 0x000 > #define PP_DITHER_BITDEPTH 0x004 > @@ -245,6 +248,32 @@ static u32 dpu_hw_pp_get_line_count(struct dpu_hw_pingpong *pp) > return line; > } > > +static int dpu_hw_pp_dsc_enable(struct dpu_hw_pingpong *pp) > +{ > + struct dpu_hw_blk_reg_map *c = &pp->hw; > + > + DPU_REG_WRITE(c, PP_DSC_MODE, 1); > + return 0; > +} > + > +static void dpu_hw_pp_dsc_disable(struct dpu_hw_pingpong *pp) > +{ > + struct dpu_hw_blk_reg_map *c = &pp->hw; > + > + DPU_REG_WRITE(c, PP_DSC_MODE, 0); > +} > + > +static int dpu_hw_pp_setup_dsc(struct dpu_hw_pingpong *pp) > +{ > + struct dpu_hw_blk_reg_map *pp_c = &pp->hw; > + int data; > + > + data = DPU_REG_READ(pp_c, PP_DCE_DATA_OUT_SWAP); > + data |= BIT(18); /* endian flip */ > + DPU_REG_WRITE(pp_c, PP_DCE_DATA_OUT_SWAP, data); > + return 0; > +} > + > static void _setup_pingpong_ops(struct dpu_hw_pingpong *c, > unsigned long features) > { > @@ -256,6 +285,9 @@ static void _setup_pingpong_ops(struct dpu_hw_pingpong *c, > c->ops.get_autorefresh = dpu_hw_pp_get_autorefresh_config; > c->ops.poll_timeout_wr_ptr = dpu_hw_pp_poll_timeout_wr_ptr; > c->ops.get_line_count = dpu_hw_pp_get_line_count; > + c->ops.setup_dsc = dpu_hw_pp_setup_dsc; > + c->ops.enable_dsc = dpu_hw_pp_dsc_enable; > + c->ops.disable_dsc = dpu_hw_pp_dsc_disable; > > if (test_bit(DPU_PINGPONG_DITHER, &features)) > c->ops.setup_dither = dpu_hw_pp_setup_dither; > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h > index 89d08a715c16..12758468d9ca 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h > @@ -124,6 +124,20 @@ struct dpu_hw_pingpong_ops { > */ > void (*setup_dither)(struct dpu_hw_pingpong *pp, > struct dpu_hw_dither_cfg *cfg); > + /** > + * Enable DSC > + */ > + int (*enable_dsc)(struct dpu_hw_pingpong *pp); > + > + /** > + * Disable DSC > + */ > + void (*disable_dsc)(struct dpu_hw_pingpong *pp); > + > + /** > + * Setup DSC > + */ > + int (*setup_dsc)(struct dpu_hw_pingpong *pp); > }; > > struct dpu_hw_merge_3d;