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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-819bb4c8186sm10172179b3a.29.2026.01.09.03.02.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 09 Jan 2026 03:02:22 -0800 (PST) Message-ID: Date: Fri, 9 Jan 2026 19:02:16 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/2] arm64: dts: qcom: monaco: Add CTCU and ETR nodes To: Bjorn Andersson , Konrad Dybcio , Konrad Dybcio , Tingwei Zhang , Mao Jinlong Cc: linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Suzuki K Poulose , Mike Leach , Rob Herring , James Clark , Krzysztof Kozlowski , Conor Dooley References: <20251103-enable-ctcu-for-monaco-v4-0-92ff83201584@oss.qualcomm.com> <20251103-enable-ctcu-for-monaco-v4-2-92ff83201584@oss.qualcomm.com> Content-Language: en-US From: Jie Gan In-Reply-To: <20251103-enable-ctcu-for-monaco-v4-2-92ff83201584@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=YNiSCBGx c=1 sm=1 tr=0 ts=6960e040 cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=li7pXvKEtyOYx0Cqe80A:9 a=QEXdDO2ut3YA:10 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-GUID: jJofqufjlCQJ7qA9fqIg7AYobWQZVMzp X-Proofpoint-ORIG-GUID: jJofqufjlCQJ7qA9fqIg7AYobWQZVMzp X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTA5MDA4MCBTYWx0ZWRfXx0QWSzBdz5WS ynDkLZ+b0R+tQr3jld4ug9rPPe3aaF9H+HHii7aV2mYmq5P75kaEltGkJXsfsRwZ8iQDwnLDEwh b+QfBo6D5LT93w/5VUx7FofUGzSTNYMlVBv0GPV5h5CbMWhi1I18U61l3AJ7opLmKVUW0LgoaBN uRcNixG4tOGgF7yz589cwh6LibROU1aUU8YPEK4w5dtBCt0L0zag5m2iajDK0jw/5ASgpms8pCs aX1DxoQwNm7P7toKSdDp6pf6YL2pzLsWoqiBUheUkUyF8U3AsBzrDxn1IYJS1/OOnFZ+rzZ/O4S SsUwuIjypHu0aZ7uIhd5gsMnfnPj7NNDhTryk9wwWk4D4iraI/994O7I6FUR3PRXFg3moZO+0KW lFqN9GGvUksQq6C+LsXEVLSrrm7dDBboOhGVSp3f7D5OjYMOc0PgiBvqhKP8zMV2I/wLfj2GiCs EAV0pYV7NuOFnILtkbw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-09_03,2026-01-08_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 suspectscore=0 impostorscore=0 adultscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2601090080 On 11/3/2025 3:06 PM, Jie Gan wrote: > Add CTCU and ETR nodes in DT to enable expected functionalities. > Gentle ping. Do we have a chance to apply this patch? Thanks, Jie > Acked-by: Konrad Dybcio > Signed-off-by: Jie Gan > --- > arch/arm64/boot/dts/qcom/monaco.dtsi | 153 +++++++++++++++++++++++++++++++++++ > 1 file changed, 153 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi > index 816fa2af8a9a..1966dfad2dcc 100644 > --- a/arch/arm64/boot/dts/qcom/monaco.dtsi > +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi > @@ -2483,6 +2483,35 @@ lpass_ag_noc: interconnect@3c40000 { > qcom,bcm-voters = <&apps_bcm_voter>; > }; > > + ctcu@4001000 { > + compatible = "qcom,qcs8300-ctcu", "qcom,sa8775p-ctcu"; > + reg = <0x0 0x04001000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb"; > + > + in-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + ctcu_in0: endpoint { > + remote-endpoint = <&etr0_out>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + > + ctcu_in1: endpoint { > + remote-endpoint = <&etr1_out>; > + }; > + }; > + }; > + }; > + > stm@4002000 { > compatible = "arm,coresight-stm", "arm,primecell"; > reg = <0x0 0x04002000 0x0 0x1000>, > @@ -2677,6 +2706,122 @@ qdss_funnel_out: endpoint { > }; > }; > > + replicator@4046000 { > + compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; > + reg = <0x0 0x04046000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + in-ports { > + port { > + qdss_rep_in: endpoint { > + remote-endpoint = <&swao_rep_out0>; > + }; > + }; > + }; > + > + out-ports { > + port { > + qdss_rep_out0: endpoint { > + remote-endpoint = <&etr_rep_in>; > + }; > + }; > + }; > + }; > + > + tmc@4048000 { > + compatible = "arm,coresight-tmc", "arm,primecell"; > + reg = <0x0 0x04048000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + iommus = <&apps_smmu 0x04c0 0x00>; > + > + arm,scatter-gather; > + > + in-ports { > + port { > + etr0_in: endpoint { > + remote-endpoint = <&etr_rep_out0>; > + }; > + }; > + }; > + > + out-ports { > + port { > + etr0_out: endpoint { > + remote-endpoint = <&ctcu_in0>; > + }; > + }; > + }; > + }; > + > + replicator@404e000 { > + compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; > + reg = <0x0 0x0404e000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + in-ports { > + port { > + etr_rep_in: endpoint { > + remote-endpoint = <&qdss_rep_out0>; > + }; > + }; > + }; > + > + out-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + etr_rep_out0: endpoint { > + remote-endpoint = <&etr0_in>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + > + etr_rep_out1: endpoint { > + remote-endpoint = <&etr1_in>; > + }; > + }; > + }; > + }; > + > + tmc@404f000 { > + compatible = "arm,coresight-tmc", "arm,primecell"; > + reg = <0x0 0x0404f000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + iommus = <&apps_smmu 0x04a0 0x40>; > + > + arm,scatter-gather; > + arm,buffer-size = <0x400000>; > + > + in-ports { > + port { > + etr1_in: endpoint { > + remote-endpoint = <&etr_rep_out1>; > + }; > + }; > + }; > + > + out-ports { > + port { > + etr1_out: endpoint { > + remote-endpoint = <&ctcu_in1>; > + }; > + }; > + }; > + }; > + > tpdm@4841000 { > compatible = "qcom,coresight-tpdm", "arm,primecell"; > reg = <0x0 0x04841000 0x0 0x1000>; > @@ -3106,6 +3251,14 @@ out-ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + > + swao_rep_out0: endpoint { > + remote-endpoint = <&qdss_rep_in>; > + }; > + }; > + > port@1 { > reg = <1>; > >