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Mon, 26 May 2025 01:43:08 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFoizJR5p+a89MPZAfJfUO3m/tGSDp0byZESTr1wQfYRLYacqwKo8ENa6edgbqkfWqehnyKgg== X-Received: by 2002:a05:6a00:14c6:b0:736:5438:ccc with SMTP id d2e1a72fcca58-745fde87a75mr12107134b3a.9.1748248987935; Mon, 26 May 2025 01:43:07 -0700 (PDT) Received: from [10.239.154.73] ([114.94.8.21]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-742a970c8a8sm17197718b3a.60.2025.05.26.01.43.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 26 May 2025 01:43:07 -0700 (PDT) Message-ID: Date: Mon, 26 May 2025 16:43:03 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Fenglin Wu Subject: Re: [PATCH 5/5] power: supply: qcom-battmgr: Add charge control support To: Neil Armstrong , =?UTF-8?Q?Gy=C3=B6rgy_Kurucz?= , Sebastian Reichel , Bjorn Andersson Cc: Subbaraman Narayanamurthy , David Collins , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, kernel@oss.qualcomm.com References: <20250523-qcom_battmgr_update-v1-0-2bb6d4e0a56e@oss.qualcomm.com> <20250523-qcom_battmgr_update-v1-5-2bb6d4e0a56e@oss.qualcomm.com> <1b1c4617-0e5b-40c8-9a66-d243b48c0977@oss.qualcomm.com> <70b6d885-ca52-4731-9a78-80dd25248e2f@linaro.org> Content-Language: en-US In-Reply-To: <70b6d885-ca52-4731-9a78-80dd25248e2f@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=UOXdHDfy c=1 sm=1 tr=0 ts=6834299d cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=Uz3yg00KUFJ2y2WijEJ4bw==:17 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=KKAkSRfTAAAA:8 a=Htw2NgF16vZQhe7wStQA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=zc0IvFSfCIW2DFIPzwfm:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: Z9_CKaAGkSXTTe0y2hwzyNzwu4acTxj_ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTI2MDA3MiBTYWx0ZWRfX7LOuPob77Nll FrCcEh1h8kbMX1U3DTYfH36TEBs0GrlliSF8XEtZKNN9ZhtUSNI5KM79hpJH95/uk7dtSN+rT5i HUQ/75C9vmosgV9fTR3Z3StKDos53pdgB24GnTSsX4fe8SISHaM4X3vol8N3MNcJdJZIoUxvwae GdhoKIL1TcP9V5rJORynsX7MH60RKCSqBey4RyBuRsU1uU9bP5wH0MOQqrC1SGKqYRA076dil/b ppvTwBdK2c9mxgsjoBVm5ASykhqIsyWyUghiWxNobkSYDbGLhbi5/+4cj1HRNS8GV8lHeXGGyyx SuzHN/5goJvNVU0IxqJ0twvnJ1cPGV1CynRI7+F//tjBrZcabHu6ni54owJ79All0ow2YfP0bPg 2EwUlk40zvf0sYheRmHSsa/oSzKOuRDoV1Bms663jkxYb4cQtd58l5pU//sEklMEWYB/CbBa X-Proofpoint-GUID: Z9_CKaAGkSXTTe0y2hwzyNzwu4acTxj_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-26_04,2025-05-22_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 phishscore=0 mlxscore=0 adultscore=0 priorityscore=1501 mlxlogscore=999 bulkscore=0 malwarescore=0 impostorscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505160000 definitions=main-2505260072 On 5/26/2025 4:27 PM, neil.armstrong@linaro.org wrote: > On 26/05/2025 08:19, Fenglin Wu wrote: >> >> On 5/24/2025 5:29 AM, György Kurucz wrote: >>> Hi! >>> >>>> +static int qcom_battmgr_set_charge_control(struct qcom_battmgr >>>> *battmgr, >>>> +                       u32 target_soc, u32 delta_soc) >>>> +{ >>>> +    struct qcom_battmgr_charge_ctrl_request request = { >>>> +        .hdr.owner = cpu_to_le32(PMIC_GLINK_OWNER_BATTMGR), >>>> +        .hdr.type = cpu_to_le32(PMIC_GLINK_REQ_RESP), >>>> +        .hdr.opcode = cpu_to_le32(BATTMGR_CHG_CTRL_LIMIT_EN), >>>> +        .enable = cpu_to_le32(1), >>>> +        .target_soc = cpu_to_le32(target_soc), >>>> +        .delta_soc = cpu_to_le32(delta_soc), >>>> +    }; >>>> + >>>> +    return qcom_battmgr_request(battmgr, &request, sizeof(request)); >>>> +} >>>> + >>>> +static int qcom_battmgr_set_charge_start_threshold(struct >>>> qcom_battmgr *battmgr, int soc) >>>> +{ >>>> +    u32 target_soc, delta_soc; >>>> +    int ret; >>>> + >>>> +    if (soc < CHARGE_CTRL_START_THR_MIN || >>>> +            soc > CHARGE_CTRL_START_THR_MAX) { >>>> +        dev_err(battmgr->dev, "charge control start threshold >>>> exceed range: [%u - %u]\n", >>>> +                CHARGE_CTRL_START_THR_MIN, >>>> CHARGE_CTRL_START_THR_MAX); >>>> +        return -EINVAL; >>>> +    } >>>> + >>>> +    /* >>>> +     * If the new start threshold is larger than the old end >>>> threshold, >>>> +     * move the end threshold one step (DELTA_SOC) after the new >>>> start >>>> +     * threshold. >>>> +     */ >>>> +    if (soc > battmgr->info.charge_ctrl_end) { >>>> +        target_soc = soc + CHARGE_CTRL_DELTA_SOC; >>>> +        target_soc = min_t(u32, target_soc, CHARGE_CTRL_END_THR_MAX); >>>> +        delta_soc = target_soc - soc; >>>> +        delta_soc = min_t(u32, delta_soc, CHARGE_CTRL_DELTA_SOC); >>>> +    } else { >>>> +        target_soc =  battmgr->info.charge_ctrl_end; >>>> +        delta_soc = battmgr->info.charge_ctrl_end - soc; >>>> +    } >>>> + >>>> +    mutex_lock(&battmgr->lock); >>>> +    ret = qcom_battmgr_set_charge_control(battmgr, target_soc, >>>> delta_soc); >>>> +    mutex_unlock(&battmgr->lock); >>>> +    if (!ret) { >>>> +        battmgr->info.charge_ctrl_start = soc; >>>> +        battmgr->info.charge_ctrl_end = target_soc; >>>> +    } >>>> + >>>> +    return 0; >>>> +} >>>> + >>>> +static int qcom_battmgr_set_charge_end_threshold(struct >>>> qcom_battmgr *battmgr, int soc) >>>> +{ >>>> +    u32 delta_soc = CHARGE_CTRL_DELTA_SOC; >>>> +    int ret; >>>> + >>>> +    if (soc < CHARGE_CTRL_END_THR_MIN || >>>> +            soc > CHARGE_CTRL_END_THR_MAX) { >>>> +        dev_err(battmgr->dev, "charge control end threshold exceed >>>> range: [%u - %u]\n", >>>> +                CHARGE_CTRL_END_THR_MIN, CHARGE_CTRL_END_THR_MAX); >>>> +        return -EINVAL; >>>> +    } >>>> + >>>> +    if (battmgr->info.charge_ctrl_start && soc > >>>> battmgr->info.charge_ctrl_start) >>>> +        delta_soc = soc - battmgr->info.charge_ctrl_start; >>>> + >>>> +    mutex_lock(&battmgr->lock); >>>> +    ret = qcom_battmgr_set_charge_control(battmgr, soc, delta_soc); >>>> +    mutex_unlock(&battmgr->lock); >>>> +    if (!ret) { >>>> +        battmgr->info.charge_ctrl_start = soc - delta_soc; >>>> +        battmgr->info.charge_ctrl_end = soc; >>>> +    } >>>> + >>>> +    return 0; >>>> +} >>> >>> These function names sound quite generic, but AFAIU this patch is >>> only adding charge control support for the SM8550. Is sc8280xp and >>> x1e80100 also expected to be supported using the same >>> qcom_battmgr_charge_ctrl_request format? >> >> No, sc8280xp and x1e80100 don't support it. So I didn't add the >> support for them. > > And what about SM8650 and SM8750 ? > > Neil > Both SM8650 and SM8750 support charge control functionality. I saw SM8650 has already used "qcom,sm8550-pmic-glink" as fallback compatible string, so it will have it enabled by default when the change gets accepted. SM8750 platform can also use "qcom,sm8550-pmic-glink" as fallback to support it when uploading the DT change. Fenglin >> >> These are generic functions are similar to >> "qcom_battmgr_update_charge_time" and "qcom_battmgr_update_info" >> which are only used for sc8280xp platform. Even right now charge >> control is only supported in mobile platforms starting from SM8550, >> however, it could be potentially supported in battery management >> firmware of any future platforms and the same functions could be reused. >> >>> Thanks, >>> György >> >