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McKenney" , Boqun Feng , Paolo Bonzini , Sean Christopherson , Wei Liu , Dexuan Cui , x86@kernel.org, Arnd Bergmann , Heiko Carstens , Christian Borntraeger , Sven Schnelle , Huacai Chen , Paul Walmsley , Palmer Dabbelt References: <20250823161326.635281786@linutronix.de> <20250823161653.452303254@linutronix.de> From: Mathieu Desnoyers Content-Language: en-US In-Reply-To: <20250823161653.452303254@linutronix.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: YQBPR0101CA0111.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:c01:5::14) To YT2PR01MB9175.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:b01:be::5) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: YT2PR01MB9175:EE_|YQBPR0101MB5767:EE_ X-MS-Office365-Filtering-Correlation-Id: 2b7e059a-dff7-465a-099d-08dde3eddc55 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014|7416014|7053199007; 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Typo in the subject: resq -> rseq > > Signed-off-by: Thomas Gleixner Other than this nit: Reviewed-by: Mathieu Desnoyers > --- > kernel/rseq.c | 119 ++++++++++++++++++++++++++++------------------------------ > 1 file changed, 59 insertions(+), 60 deletions(-) > > --- a/kernel/rseq.c > +++ b/kernel/rseq.c > @@ -8,6 +8,65 @@ > * Mathieu Desnoyers > */ > > +/* > + * Restartable sequences are a lightweight interface that allows > + * user-level code to be executed atomically relative to scheduler > + * preemption and signal delivery. Typically used for implementing > + * per-cpu operations. > + * > + * It allows user-space to perform update operations on per-cpu data > + * without requiring heavy-weight atomic operations. > + * > + * Detailed algorithm of rseq user-space assembly sequences: > + * > + * init(rseq_cs) > + * cpu = TLS->rseq::cpu_id_start > + * [1] TLS->rseq::rseq_cs = rseq_cs > + * [start_ip] ---------------------------- > + * [2] if (cpu != TLS->rseq::cpu_id) > + * goto abort_ip; > + * [3] > + * [post_commit_ip] ---------------------------- > + * > + * The address of jump target abort_ip must be outside the critical > + * region, i.e.: > + * > + * [abort_ip] < [start_ip] || [abort_ip] >= [post_commit_ip] > + * > + * Steps [2]-[3] (inclusive) need to be a sequence of instructions in > + * userspace that can handle being interrupted between any of those > + * instructions, and then resumed to the abort_ip. > + * > + * 1. Userspace stores the address of the struct rseq_cs assembly > + * block descriptor into the rseq_cs field of the registered > + * struct rseq TLS area. This update is performed through a single > + * store within the inline assembly instruction sequence. > + * [start_ip] > + * > + * 2. Userspace tests to check whether the current cpu_id field match > + * the cpu number loaded before start_ip, branching to abort_ip > + * in case of a mismatch. > + * > + * If the sequence is preempted or interrupted by a signal > + * at or after start_ip and before post_commit_ip, then the kernel > + * clears TLS->__rseq_abi::rseq_cs, and sets the user-space return > + * ip to abort_ip before returning to user-space, so the preempted > + * execution resumes at abort_ip. > + * > + * 3. Userspace critical section final instruction before > + * post_commit_ip is the commit. The critical section is > + * self-terminating. > + * [post_commit_ip] > + * > + * 4. > + * > + * On failure at [2], or if interrupted by preempt or signal delivery > + * between [1] and [3]: > + * > + * [abort_ip] > + * F1. > + */ > + > #include > #include > #include > @@ -98,66 +157,6 @@ static int rseq_validate_ro_fields(struc > unsafe_put_user(value, &t->rseq->field, error_label) > #endif > > -/* > - * > - * Restartable sequences are a lightweight interface that allows > - * user-level code to be executed atomically relative to scheduler > - * preemption and signal delivery. Typically used for implementing > - * per-cpu operations. > - * > - * It allows user-space to perform update operations on per-cpu data > - * without requiring heavy-weight atomic operations. > - * > - * Detailed algorithm of rseq user-space assembly sequences: > - * > - * init(rseq_cs) > - * cpu = TLS->rseq::cpu_id_start > - * [1] TLS->rseq::rseq_cs = rseq_cs > - * [start_ip] ---------------------------- > - * [2] if (cpu != TLS->rseq::cpu_id) > - * goto abort_ip; > - * [3] > - * [post_commit_ip] ---------------------------- > - * > - * The address of jump target abort_ip must be outside the critical > - * region, i.e.: > - * > - * [abort_ip] < [start_ip] || [abort_ip] >= [post_commit_ip] > - * > - * Steps [2]-[3] (inclusive) need to be a sequence of instructions in > - * userspace that can handle being interrupted between any of those > - * instructions, and then resumed to the abort_ip. > - * > - * 1. Userspace stores the address of the struct rseq_cs assembly > - * block descriptor into the rseq_cs field of the registered > - * struct rseq TLS area. This update is performed through a single > - * store within the inline assembly instruction sequence. > - * [start_ip] > - * > - * 2. Userspace tests to check whether the current cpu_id field match > - * the cpu number loaded before start_ip, branching to abort_ip > - * in case of a mismatch. > - * > - * If the sequence is preempted or interrupted by a signal > - * at or after start_ip and before post_commit_ip, then the kernel > - * clears TLS->__rseq_abi::rseq_cs, and sets the user-space return > - * ip to abort_ip before returning to user-space, so the preempted > - * execution resumes at abort_ip. > - * > - * 3. Userspace critical section final instruction before > - * post_commit_ip is the commit. The critical section is > - * self-terminating. > - * [post_commit_ip] > - * > - * 4. > - * > - * On failure at [2], or if interrupted by preempt or signal delivery > - * between [1] and [3]: > - * > - * [abort_ip] > - * F1. > - */ > - > static int rseq_update_cpu_node_id(struct task_struct *t) > { > struct rseq __user *rseq = t->rseq; > -- Mathieu Desnoyers EfficiOS Inc. https://www.efficios.com