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From: "Jiaxun Yang" <jiaxun.yang@flygoat.com>
To: "Thomas Bogendoerfer" <tsbogend@alpha.franken.de>
Cc: "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
	linux-kernel@vger.kernel.org, stable@kernel.org
Subject: Re: [PATCH] MIPS: mm: tlb-r4k: Uniquify TLB entries on init
Date: Fri, 06 Jun 2025 14:30:43 +0100	[thread overview]
Message-ID: <a70690be-64ba-4337-bca2-23f93b645b62@app.fastmail.com> (raw)
In-Reply-To: <20250605-tlb-fix-v1-1-4af496f17b2f@flygoat.com>



在2025年6月5日周四 上午11:02,Jiaxun Yang写道:
> Hardware or bootloader will initialize TLB entries to any value, which
> may collide with kernel's UNIQUE_ENTRYHI value. On MIPS microAptiv/M5150
> family of cores this will trigger machine check exception and cause boot
> failure. On M5150 simulation this could happen 7 times out of 1000 boots.
>
> Replace local_flush_tlb_all() with r4k_tlb_uniquify() which probes each
> TLB ENTRIHI unique value for collisions before it's written and overwrites
> any conflicting entries with safe values before initializing the kernel's
> UNIQUE_ENTRYHI pattern.

I just realised it might be easier to cycling ASID instead of address in
Entry Hi.

Will come try a v2.

Thanks
Jiaxun

[...]

-- 
- Jiaxun

  reply	other threads:[~2025-06-06 13:31 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-05 10:02 Jiaxun Yang
2025-06-06 13:30 ` Jiaxun Yang [this message]
2025-06-07  2:48 ` Maciej W. Rozycki
2025-06-07 10:36   ` Jiaxun Yang

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