From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6CBE8C433F5 for ; Fri, 27 May 2022 03:21:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238167AbiE0DVC (ORCPT ); Thu, 26 May 2022 23:21:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41556 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230355AbiE0DU6 (ORCPT ); Thu, 26 May 2022 23:20:58 -0400 Received: from mail-sz.amlogic.com (mail-sz.amlogic.com [211.162.65.117]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1E55A99693 for ; Thu, 26 May 2022 20:20:57 -0700 (PDT) Received: from [10.28.39.121] (10.28.39.121) by mail-sz.amlogic.com (10.28.11.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Fri, 27 May 2022 11:20:55 +0800 Message-ID: Date: Fri, 27 May 2022 11:20:55 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH v5 2/4] mtd: rawnand: meson: fix the clock Content-Language: en-US To: Kevin Hilman , Miquel Raynal , CC: Rob Herring , Richard Weinberger , Vignesh Raghavendra , Jerome Brunet , Neil Armstrong , Martin Blumenstingl , Jianxin Pan , Victor Wan , XianWei Zhao , Kelvin Zhang , BiChao Zheng , YongHui Yu , , , References: <20220513123404.48513-1-liang.yang@amlogic.com> <20220513123404.48513-3-liang.yang@amlogic.com> <7hwne88dha.fsf@baylibre.com> From: Liang Yang In-Reply-To: <7hwne88dha.fsf@baylibre.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.28.39.121] X-ClientProxiedBy: mail-sz.amlogic.com (10.28.11.5) To mail-sz.amlogic.com (10.28.11.5) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Kevin, Thanks for your review. On 2022/5/27 0:28, Kevin Hilman wrote: > [ EXTERNAL EMAIL ] > > Hi Liang, > > Liang Yang writes: > >> EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK' >> which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is >> the divider and bit6~7 is the mux for fix pll and xtal. At the beginning, >> a common MMC and NAND sub-clock was discussed and planed to be implemented >> as NFC clock provider, but now this series of patches of a common MMC and >> NAND sub-clock are never being accepted. the reasons for giving up are: >> 1. EMMC and NAND, which are mutually exclusive anyway >> 2. coupling the EMMC and NAND. >> 3. it seems that a common MMC and NAND sub-clock is over engineered. >> and let us see the link fot more information: >> https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com >> so The meson nfc can't work now, let us rework the clock. >> >> Signed-off-by: Liang Yang > > Reviewed-by: Kevin Hilman > > Thank you for your persistence in working on multiple iterations of this > until we came to a final agreement. > > Kevin > > .