Re: [PATCH V3 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume

[Jon Hunter <jonathanh@nvidia.com>]

On 06/04/17 17:48, Laxman Dewangan wrote:
> 
> On Thursday 06 April 2017 08:56 PM, Jon Hunter wrote:
>> On 06/04/17 15:21, Laxman Dewangan wrote:
>>> In some of NVIDIA Tegra's platform, PWM controller is used to
>>> control the PWM controlled regulators. PWM signal is connected to
>>> the VID pin of the regulator where duty cycle of PWM signal decide
>>> the voltage level of the regulator output.
>>>
>>> The tristate (high impedance of PWM pin form Tegra) also define
>> s/form/from/
>> s/define/defines/
>>
>>> one of the state of PWM regulator which needs to be configure in
>>> suspend state of system.
>> It maybe clearer to say that when the system enters suspend the
>> regulator requires the pwm output to be tristated.
> 
> Not necessarily that every PWM regulator interfaces needs it.  It
> depends on the devices.

Yes I understand that. I am just saying the description could be a
little clearer.

> So I will say:
> 
> When system enters suspend, in some of PWM regulator interface, it is
> required to to set the PWM output to be tristated.

Ok, but I think you should say why that is, because from the above
sentence alone it is not clear. Maybe you should say that some PWM
client/slave devices require the PWM output to be tristated.

Jon

-- 
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