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([2a01:e0a:59e:9d80:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-388c801a8bbsm14342588f8f.56.2024.12.18.07.28.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 18 Dec 2024 07:28:36 -0800 (PST) Message-ID: Date: Wed, 18 Dec 2024 16:28:34 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V2 11/46] arm64/sysreg: Add register fields for PMSIDR_EL1 Content-Language: en-US To: Anshuman Khandual , linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, maz@kernel.org Cc: ryan.roberts@arm.com, Oliver Upton , James Morse , Suzuki K Poulose , Catalin Marinas , Will Deacon , Mark Brown References: <20241210055311.780688-1-anshuman.khandual@arm.com> <20241210055311.780688-12-anshuman.khandual@arm.com> From: Eric Auger In-Reply-To: <20241210055311.780688-12-anshuman.khandual@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12/10/24 06:52, Anshuman Khandual wrote: > This adds register fields for PMSIDR_EL1 as per the definitions based > on DDI0601 2024-09. > > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Mark Brown > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Signed-off-by: Anshuman Khandual Reviewed-by: Eric Auger Eric > --- > arch/arm64/tools/sysreg | 16 ++++++++++++++-- > 1 file changed, 14 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg > index be0091060350..a5e31e4c4474 100644 > --- a/arch/arm64/tools/sysreg > +++ b/arch/arm64/tools/sysreg > @@ -2172,7 +2172,16 @@ Field 15:0 MINLAT > EndSysreg > > Sysreg PMSIDR_EL1 3 0 9 9 7 > -Res0 63:25 > +Res0 63:33 > +Field 32 SME > +UnsignedEnum 31:28 ALTCLK > + 0b0000 NI > + 0b0001 IMP > + 0b1111 IMP_DEF > +EndEnum > +Field 27 FPF > +Field 26 EFT > +Field 25 CRR > Field 24 PBT > Field 23:20 FORMAT > Enum 19:16 COUNTSIZE > @@ -2190,7 +2199,10 @@ Enum 11:8 INTERVAL > 0b0111 3072 > 0b1000 4096 > EndEnum > -Res0 7 > +UnsignedEnum 7 FDS > + 0b0 NI > + 0b1 IMP > +EndEnum > Field 6 FnE > Field 5 ERND > Field 4 LDS