From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66AB9C433FE for ; Fri, 17 Sep 2021 16:11:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4A4A7610E9 for ; Fri, 17 Sep 2021 16:11:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243533AbhIQQM7 (ORCPT ); Fri, 17 Sep 2021 12:12:59 -0400 Received: from mga04.intel.com ([192.55.52.120]:23788 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235075AbhIQQM4 (ORCPT ); Fri, 17 Sep 2021 12:12:56 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10110"; a="220942979" X-IronPort-AV: E=Sophos;i="5.85,301,1624345200"; d="scan'208";a="220942979" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2021 09:11:33 -0700 X-IronPort-AV: E=Sophos;i="5.85,301,1624345200"; d="scan'208";a="546477445" Received: from zengguan-mobl.ccr.corp.intel.com (HELO [10.254.208.219]) ([10.254.208.219]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2021 09:11:28 -0700 Subject: Re: [PATCH v4 1/6] x86/feat_ctl: Add new VMX feature, Tertiary VM-Execution control To: Sean Christopherson Cc: Paolo Bonzini , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , "kvm@vger.kernel.org" , Dave Hansen , "Luck, Tony" , Kan Liang , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Kim Phillips , Jarkko Sakkinen , Jethro Beekman , "Huang, Kai" , "x86@kernel.org" , "linux-kernel@vger.kernel.org" , "Hu, Robert" , "Gao, Chao" , Robert Hoo References: <20210809032925.3548-1-guang.zeng@intel.com> <20210809032925.3548-2-guang.zeng@intel.com> From: Zeng Guang Message-ID: Date: Sat, 18 Sep 2021 00:10:59 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Firefox/78.0 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 9/11/2021 5:25 AM, Sean Christopherson wrote: > x86/cpu: is probaby more appropriate, this touches more than just feat_ctl. > > On Mon, Aug 09, 2021, Zeng Guang wrote: >> From: Robert Hoo >> >> New VMX capability MSR IA32_VMX_PROCBASED_CTLS3 conresponse to this new >> VM-Execution control field. And it is 64bit allow-1 semantics, not like >> previous capability MSRs 32bit allow-0 and 32bit allow-1. So with Tertiary >> VM-Execution control field introduced, 2 vmx_feature leaves are introduced, >> TERTIARY_CTLS_LOW and TERTIARY_CTLS_HIGH. >> >> Signed-off-by: Robert Hoo >> Signed-off-by: Zeng Guang >> --- > Nits aside, > > Reviewed-by: Sean Christopherson > >> @@ -22,7 +24,7 @@ enum vmx_feature_leafs { >> >> static void init_vmx_capabilities(struct cpuinfo_x86 *c) >> { >> - u32 supported, funcs, ept, vpid, ign; >> + u32 supported, funcs, ept, vpid, ign, low, high; >> >> BUILD_BUG_ON(NVMXINTS != NR_VMX_FEATURE_WORDS); >> >> @@ -42,6 +44,13 @@ static void init_vmx_capabilities(struct cpuinfo_x86 *c) >> rdmsr_safe(MSR_IA32_VMX_PROCBASED_CTLS2, &ign, &supported); >> c->vmx_capability[SECONDARY_CTLS] = supported; >> >> + /* >> + * For tertiary execution controls MSR, it's actually a 64bit allowed-1. >> + */ > Maybe something like this to better fit on one line? > > /* All 64 bits of tertiary controls MSR are allowed-1 settings. */ > >> + rdmsr_safe(MSR_IA32_VMX_PROCBASED_CTLS3, &low, &high); >> + c->vmx_capability[TERTIARY_CTLS_LOW] = low; >> + c->vmx_capability[TERTIARY_CTLS_HIGH] = high; >> + >> rdmsr(MSR_IA32_VMX_PINBASED_CTLS, ign, supported); >> rdmsr_safe(MSR_IA32_VMX_VMFUNC, &ign, &funcs); >> >> -- >> 2.25.1 Thanks for reviewed-by.