From: Hao Zhang <quic_hazha@quicinc.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@linaro.org>, Leo Yan <leo.yan@linaro.org>,
James Clark <james.clark@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
Konrad Dybcio <konradybcio@gmail.com>,
"Rob Herring" <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Andy Gross <agross@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Jonathan Corbet <corbet@lwn.net>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
<coresight@lists.linaro.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
Tingwei Zhang <quic_tingweiz@quicinc.com>,
Jinlong Mao <quic_jinlmao@quicinc.com>,
"Yuanfang Zhang" <quic_yuanfang@quicinc.com>,
Tao Zhang <quic_taozha@quicinc.com>,
Trilok Soni <quic_tsoni@quicinc.com>,
<linux-arm-msm@vger.kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
<linux-doc@vger.kernel.org>
Subject: Re: [PATCH v6 2/3] dt-bindings: arm: Add support for Coresight dummy trace
Date: Thu, 8 Jun 2023 15:45:36 +0800 [thread overview]
Message-ID: <a7ccc45f-5fe5-37b0-c9d6-736efd9b6feb@quicinc.com> (raw)
In-Reply-To: <20230602084149.40031-3-quic_hazha@quicinc.com>
Hi Reviewers,
Could you please help to review this patch?
Thanks
Hao
On 6/2/2023 4:41 PM, Hao Zhang wrote:
> This patch add support for Coresight dummy source and dummy sink trace.
>
> Signed-off-by: Hao Zhang <quic_hazha@quicinc.com>
> ---
> .../arm/arm,coresight-dummy-sink.yaml | 73 +++++++++++++++++++
> .../arm/arm,coresight-dummy-source.yaml | 71 ++++++++++++++++++
> 2 files changed, 144 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml
> create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml
> new file mode 100644
> index 000000000000..cb78cfa56702
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-sink.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ARM Coresight Dummy sink component
> +
> +description: |
> + CoreSight components are compliant with the ARM CoreSight architecture
> + specification and can be connected in various topologies to suit a particular
> + SoCs tracing needs. These trace components can generally be classified as
> + sinks, links and sources. Trace data produced by one or more sources flows
> + through the intermediate links connecting the source to the currently selected
> + sink.
> +
> + The Coresight dummy sink component is for the specific coresight sink devices
> + kernel don't have permission to access or configure, e.g., CoreSight EUD on
> + Qualcomm platforms. It is a mini-USB hub implemented to support the USB-based
> + debug and trace capabilities. For this device, a dummy driver is needed to
> + register it as Coresight sink device in kernel side, so that path can be
> + created in the driver. Then the trace flow would be transferred to EUD via
> + coresight link of AP processor. It provides Coresight API for operations on
> + dummy source devices, such as enabling and disabling them. It also provides
> + the Coresight dummy source paths for debugging.
> +
> + The primary use case of the coresight dummy sink is to build path in kernel
> + side for dummy sink component.
> +
> +maintainers:
> + - Mike Leach <mike.leach@linaro.org>
> + - Suzuki K Poulose <suzuki.poulose@arm.com>
> + - James Clark <james.clark@arm.com>
> + - Mao Jinlong <quic_jinlmao@quicinc.com>
> + - Hao Zhang <quic_hazha@quicinc.com>
> +
> +properties:
> + compatible:
> + enum:
> + - arm,coresight-dummy-sink
> +
> + in-ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + properties:
> + port:
> + description: Input connection from the Coresight Trace bus to
> + dummy sink, such as Embedded USB debugger(EUD).
> +
> + $ref: /schemas/graph.yaml#/properties/port
> +
> +required:
> + - compatible
> + - in-ports
> +
> +additionalProperties: false
> +
> +examples:
> + # Minimum dummy sink definition. Dummy sink connect to coresight replicator.
> + - |
> + sink {
> + compatible = "arm,coresight-dummy-sink";
> +
> + in-ports {
> + port {
> + eud_in_replicator_swao: endpoint {
> + remote-endpoint = <&replicator_swao_out_eud>;
> + };
> + };
> + };
> + };
> +
> +...
> diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml
> new file mode 100644
> index 000000000000..5fedaed49a1f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml
> @@ -0,0 +1,71 @@
> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-source.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ARM Coresight Dummy source component
> +
> +description: |
> + CoreSight components are compliant with the ARM CoreSight architecture
> + specification and can be connected in various topologies to suit a particular
> + SoCs tracing needs. These trace components can generally be classified as
> + sinks, links and sources. Trace data produced by one or more sources flows
> + through the intermediate links connecting the source to the currently selected
> + sink.
> +
> + The Coresight dummy source component is for the specific coresight source
> + devices kernel don't have permission to access or configure. For some SOCs,
> + there would be Coresight source trace components on sub-processor which
> + are conneted to AP processor via debug bus. For these devices, a dummy driver
> + is needed to register them as Coresight source devices, so that paths can be
> + created in the driver. It provides Coresight API for operations on dummy
> + source devices, such as enabling and disabling them. It also provides the
> + Coresight dummy source paths for debugging.
> +
> + The primary use case of the coresight dummy source is to build path in kernel
> + side for dummy source component.
> +
> +maintainers:
> + - Mike Leach <mike.leach@linaro.org>
> + - Suzuki K Poulose <suzuki.poulose@arm.com>
> + - James Clark <james.clark@arm.com>
> + - Mao Jinlong <quic_jinlmao@quicinc.com>
> + - Hao Zhang <quic_hazha@quicinc.com>
> +
> +properties:
> + compatible:
> + enum:
> + - arm,coresight-dummy-source
> +
> + out-ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + properties:
> + port:
> + description: Output connection from the source to Coresight
> + Trace bus.
> + $ref: /schemas/graph.yaml#/properties/port
> +
> +required:
> + - compatible
> + - out-ports
> +
> +additionalProperties: false
> +
> +examples:
> + # Minimum dummy source definition. Dummy source connect to coresight funnel.
> + - |
> + source {
> + compatible = "arm,coresight-dummy-source";
> +
> + out-ports {
> + port {
> + dummy_riscv_out_funnel_swao: endpoint {
> + remote-endpoint = <&funnel_swao_in_dummy_riscv>;
> + };
> + };
> + };
> + };
> +
> +...
next prev parent reply other threads:[~2023-06-08 7:46 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-02 8:41 [PATCH v6 0/3] Add support to configure Coresight Dummy subunit Hao Zhang
2023-06-02 8:41 ` [PATCH v6 1/3] Coresight: Add coresight dummy driver Hao Zhang
2023-06-08 7:44 ` Hao Zhang
2023-06-02 8:41 ` [PATCH v6 2/3] dt-bindings: arm: Add support for Coresight dummy trace Hao Zhang
2023-06-08 7:45 ` Hao Zhang [this message]
2023-06-14 19:24 ` Rob Herring
2023-06-02 8:41 ` [PATCH v6 3/3] Documentation: trace: Add documentation for Coresight Dummy Trace Hao Zhang
2023-06-15 8:16 ` [PATCH v6 0/3] Add support to configure Coresight Dummy subunit Suzuki K Poulose
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=a7ccc45f-5fe5-37b0-c9d6-736efd9b6feb@quicinc.com \
--to=quic_hazha@quicinc.com \
--cc=agross@kernel.org \
--cc=alexander.shishkin@linux.intel.com \
--cc=andersson@kernel.org \
--cc=aou@eecs.berkeley.edu \
--cc=corbet@lwn.net \
--cc=coresight@lists.linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=gregkh@linuxfoundation.org \
--cc=james.clark@arm.com \
--cc=konradybcio@gmail.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=leo.yan@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mathieu.poirier@linaro.org \
--cc=mike.leach@linaro.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=quic_jinlmao@quicinc.com \
--cc=quic_taozha@quicinc.com \
--cc=quic_tingweiz@quicinc.com \
--cc=quic_tsoni@quicinc.com \
--cc=quic_yuanfang@quicinc.com \
--cc=robh+dt@kernel.org \
--cc=suzuki.poulose@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®