From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D3D4D40D58B for ; Thu, 20 Aug 2026 11:09:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.45 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787224175; cv=none; b=uMgygxL7PO0c3ONxtrDXYbLHIASgzXKoCfTTV3BKpwoUo8K3CtnlOc5zw9SH/0DTkJDiBe7K4t2TOt+4Zyw7GgpJ3UzyRUTHQ5qMbtQ+hfXbjL/1Unl8EeACci+6IMXd+4LuuMafvcYFoQN7yGJovHwGHnC4qWrFs56ioY+3Swo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787224175; c=relaxed/simple; bh=eO2sqNdutYgV24kHu9IteuM0YW3YVqfjWJ/ytDPV0tw=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=Ct2lkEAgbMIwIRqRUCxdlBmxdRjHFHOemSapKj8ykxtI7S3aAzxWAP110b4pQOmTx6GcZNtcaOHI4QSg4Hdug8bPqbt5Ha7hWtMHyPJPQsoyELkGMmBglsIwIwnYOxdJeZLkNQgko4kVUsWRpdPDDAFKWi5jFzGYhUyK0Ova2YA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=jVhQt6El; arc=none smtp.client-ip=209.85.128.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="jVhQt6El" Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-499b2981a7bso6963225e9.3 for ; Thu, 20 Aug 2026 04:09:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1787224167; x=1787828967; darn=vger.kernel.org; h=content-transfer-encoding:content-type:in-reply-to:from :content-language:references:cc:to:subject:user-agent:mime-version :date:message-id:from:to:cc:subject:date:message-id:reply-to :content-type; bh=wR3pD/p6gwd1Q6ULvoVeNrAKXm5ytJKoJTYy49XuHLE=; b=jVhQt6El9cpmSB+VlM5g73yn8wP6JQ5g9yTew4Fr2dW1l/0h0hRuvkCIGjcgW6NGnY T9U6WWKqalmcd5qxBGhLYDM9M1IINXBT/If5K0I58RcQBn6myWVSM8sTIVZy7W6Xi/ca HswkzBfv2cqZokClipS7OsDcUyP5p1Dl8Vmt6bPgmk0YhHEJnjwrR1wAHz8VKOAUTwtJ NpFo0Avkn1tyIWj5NK9LkH3Nq3JfkTNuS90a+ExMuYmNH49vTJwCOdweKBQySB4cFi2s /2fOlzarBkSzJ//oaKW2EdUItUDi4gwt05N9FwUdj1QzUw+sG0xTZ9CV8s0d085sGIHi kUsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787224167; x=1787828967; h=content-transfer-encoding:content-type:in-reply-to:from :content-language:references:cc:to:subject:user-agent:mime-version :date:message-id:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to:content-type; bh=wR3pD/p6gwd1Q6ULvoVeNrAKXm5ytJKoJTYy49XuHLE=; b=PzH/jCC5FjHt4GMa7rjZIsdktpLkdSE5AMGIEHRYZD7jg2sjYMiHhN41+c9uKWGl+r gmBCX5eOllj/FYHspLXZm3rcv9wUtfHSpuXjMUAIZAMUdvAY3WkvyS7ZHm56gbLPYdrW rLawmj1fCSAOaeGlqP3XzGMqBBzOr7xnXbvt7SV+vz2WyMnWD+/SB4i7miMOuWa/BEwZ xJHlUlVM3fcK1jW5JlG6tyEFw7XgsU9kgfEn3JRl1ny6XjbGs6x8DVTYtQcss8IvmPRU OH5ym9DcFlL05I4l1vzgftfBZYRmkg2K9ysvH3bLTfmkga1LbsQZjehUvdDvky+9YF0D KhOQ== X-Forwarded-Encrypted: i=1; AHgh+RrwbOiyes6gpnNu8sUpLBvL0jcXfs4UEzkFtiguU9Cufr/15IGhsPpCiS7TiBbIEzMQ8cCPi42faRDzJk8=@vger.kernel.org X-Gm-Message-State: AOJu0Ywr5OQjYdUYQqiOrN4CFBHYcD3G8/uJsOtlZWbHQwptXwMFqzMX F/v1T6cPVbrfMci4ad8FAzVtW2gLpv8CWmFs2YFyBbnwWmOz9cdUO8VJtt0xfxCPtm8= X-Gm-Gg: AR+sD13twaNTWSOWfC8MitwMCluU8pM6W2hVC1f7FDAYCAr/KTnwhd5om5gK3JbVbiI a2Y/lTPZhfk4W0ff0WaoLLPFPCfquqQSrBq8MlFwgrdTSvGSSIDgnSRGAMbCE9qTk7oyVRKMbaS 5X7Zq7IK47PNUJ6nUaSJk/rS+eNJ1KXUY5xMb29Gy5StyVTTk9AS1cCHKbahGpNQnUNL54QD1/K ETG3/JhqstuGuF1blAPNKjjLubFQRTnzBn9P/ga8Bm4JofEGkoEL5wHuWYs1tsLHwPHI/ZG4r/2 N+k+tVEKhOUY+ooyz1v6IxI6RDgexswRtipJqMRpGw/9c3kLdLZg1FutU91eTlrYO7jxZ21AFCN nwwAd2uSxGPIHPmWk5T3gZwU/djafLnznoSYNkmSKCjytPlNZiSyy+Ir2x9Qk0BDk0wqtkuC1x2 2DJiuywkyHxHWQFIc9LOcembD70pdYfqzW7xv+E0HHoMczjDWCactaU4F1GBUO1RGKkQ== X-Received: by 2002:a05:600c:a412:b0:499:ae94:be05 with SMTP id 5b1f17b1804b1-499ae94be48mr158371875e9.0.1787224166835; Thu, 20 Aug 2026 04:09:26 -0700 (PDT) Received: from [192.168.1.3] ([37.18.141.193]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-499aa0fd7a9sm174399865e9.2.2026.08.20.04.09.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 20 Aug 2026 04:09:26 -0700 (PDT) Message-ID: Date: Thu, 20 Aug 2026 12:09:25 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 4/8] coresight: tmc-etr: Prevent per-thread events from sharing a sink To: Leo Yan Cc: Suzuki K Poulose , Mike Leach , Suyash Mahar , Yeoreum Yun , Greg Kroah-Hartman , Qi Liu , Junhao He , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonathan Cameron References: <20260728-james-cs-multiple-per-threads-v3-0-6aee7579f1dc@linaro.org> <20260728-james-cs-multiple-per-threads-v3-4-6aee7579f1dc@linaro.org> <20260813160504.GC8904@e132581.arm.com> <20260819084515.GF8904@e132581.arm.com> Content-Language: en-US From: James Clark In-Reply-To: <20260819084515.GF8904@e132581.arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 19/08/2026 09:45, Leo Yan wrote: > On Fri, Aug 14, 2026 at 10:09:01AM +0100, James Clark wrote: > > [...] > >> There isn't any sharing with "another perf session", unless there is a >> mistake somewhere? Checking that the owners are equivalent enforces this. Or >> do you mean another event owned by the same process? > > Now I understand that the problem is constrained to different events > within the same session. > >> I'm not sure the exact model you had in mind was that still supports this >> and fixes the bugs? > > Let me try to describe my understanding of the problem. > > ./perf test -w named_threads 2 1000000 & > ./perf record -e cs_etm//u --per-thread --pid $! > > We can simplify the flow as: > > | T1 | > CPU0 ------------------------------ > | T2 | > CPU1 ------------------------------ > `> T2 stops and the driver reports > the warning when trying to sync > ETR_BUF(T1), while T2 is associated > with ETR_BUF(T2). > > AUX_BUF(T1) | | > ETR_BUF(T1) | Bounce buf0 | -> Used by H/W trace > > > AUX_BUF(T2) | | > ETR_BUF(T2) | Bounce buf1 | -> Not used by H/W trace > > With `--per-thread --pid $PID`, perf creates separate events for the > child threads, say T1 and T2. Perf allocates a separate AUX buffer > for each event, and the ETR driver also allocates a separate bounce > buffer for each event. However, because there is only one shared ETR > sink, only one of those bounce buffers can actually be used by the > hardware at a time. > > If T1 stops while T2 is still running, the ETR remains enabled. Later, > when T2 stops, the ETR is still using ETR_BUF(T1). This mismatch > triggers the warning and prevents the data from being copied. > > I am just wandering if we can improve the sink driver to only allocate > a single bounce buffer that is independent of any threads (and any > associated events). > > | T1 | > CPU0 ------------------------------ > | T2 | > CPU1 ------------------------------ > `> T2 stops and can sync trace > from the shared bounce buffer > to AUX_BUF(T2). > > AUX_BUF(T1) | | > AUX_BUF(T2) | | > > ETR_BUF | Bounce buf | -> Used by H/W trace > > This might also simplify the CPU-wide case. Each CPU would still have > its own AUX buffer, but the ETR driver would maintain only one bounce > buffer for the shared sink. A reference count could track how many > events are using the sink, with the final event responsible for Isn't this how it's already working? get_perf_etr_buf_cpu_wide() allocates a single shared buffer with a refcount. I didn't change this, I only changed the rules about what is considered shared or not so that it matches the semantics of the perf events that back the tracing session. > stopping the sink and copying the trace data from bounce buffer to aux > buffer. > >> The one in this change is pretty complete and only does 4 comparisons, >> which seems quite simple to me. > > Before going further with the heavily sink buffer refactoring, perhaps > a more pragmatic solution would be to reject the problematic case for > now. Can we do something like below? > > +void coresight_trace_id_is_perf_started(struct coresight_trace_id_map *id_map) > +{ > + PERF_SESSION(atomic_read(&id_map->perf_cs_etm_session_active)); > +} > > @@ -399,6 +399,15 @@ etm_event_build_path(struct perf_event *event, int cpu, > goto out; > } > > + if (!coresight_trace_id_is_perf_started(&sink->perf_sink_id_map)) { > + sink->perf_owner = event->owner; > + sink->perf_target = event->hw.target; > + } else { > + if (sink->perf_owner != event->owner || > + sink->perf_target != event->hw.target) > + goto out; > + } > + > > We use a central place etm_event_build_path() to record and compare > event's owner and target process, then we don't need to spread the > check into sink drivers. We only care about if owner and target must > be consistent. But we don't know where the target will run when the event is created. That's why the check is delayed until etm_event_start() and the process has been scheduled. Where it runs needs to be taken into account to calculate if this sink can be shared. Moving the check to event creation time would cause a regression for two users that plan to trace two different threads (or different CPUs where the processes are known to never run on a shared sink at the same time). With your example the second user is completely prohibited from opening per-thread events, but with the existing driver and this change it works. I think that's quite a significant change in functionality, what's the justification for taking those use cases away from users? > > Regard of the inherit/inherit_thread, I always see they are consistent > within the same session. Should we ignore them? Do you mean they are always consistent in Perf? I don't think the driver can afford to bend the rules just because Perf promises to never do it. It might not always do that, and any tool can do perf_event_open(), not just Perf. It's quite easy to imagine the bug report being: "I opened one event with inherit set, and one event without. Why do I get trace from other threads in my event without inherit set? I expect to see only trace from one process". > > Thanks, > Leo