From: Dave Hansen <dave.hansen@intel.com>
To: "Salvatore Bonaccorso" <carnil@debian.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Ingo Molnar" <mingo@redhat.com>,
"Borislav Petkov" <bp@alien8.de>,
"Dave Hansen" <dave.hansen@linux.intel.com>,
"Laurențiu Păncescu" <lpancescu@gmail.com>
Cc: x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
Sohil Mehta <sohil.mehta@intel.com>,
"Chang S. Bae" <chang.seok.bae@intel.com>,
Andi Kleen <ak@linux.intel.com>,
Eric Biggers <ebiggers@google.com>,
linux-kernel@vger.kernel.org, 1117002@bugs.debian.org
Subject: Re: WARNING: CPU: 1 PID: 0 at arch/x86/kernel/cpu/cpuid-deps.c:123 do_clear_cpu_cap+0xdc/0x130 on Intel(R) Atom(TM) CPU N450 system
Date: Fri, 17 Oct 2025 07:26:17 -0700 [thread overview]
Message-ID: <a7fa4a93-2d80-4c1d-af91-9dad9626ed9f@intel.com> (raw)
In-Reply-To: <aPJNPPFKsPKJWlLn@eldamar.lan>
On 10/17/25 07:05, Salvatore Bonaccorso wrote:
> [ 0.008282] RAX: 0000000000000000 RBX: ffffcd5fc00bfd18 RCX: 0000000000000000
> [ 0.008282] RDX: 0000000000000001 RSI: 0000000000000070 RDI: ffffcd5fc00bfd78
> [ 0.008282] RBP: 0000000000000070 R08: 0000000000000000 R09: 706f20676e697274
> [ 0.008282] R10: 7473207473616620 R11: 64656c6261736944 R12: ffffffffb8f20ba0
> [ 0.008282] R13: ffff8ad332718090 R14: 000000000000061c R15: 0000000000000000
> [ 0.008282] FS: 0000000000000000(0000) GS:ffff8ad378ec7000(0000) knlGS:0000000000000000
> [ 0.008282] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> [ 0.008282] CR2: 0000000000000000 CR3: 000000005842c000 CR4: 00000000000006f0
> [ 0.008282] Call Trace:
> [ 0.008282] <TASK>
> [ 0.008282] do_clear_cpu_cap+0x106/0x130
> [ 0.008282] early_init_intel.cold+0x4d/0x11a
> [ 0.008282] init_intel+0x2a/0x2c0
> [ 0.008282] identify_cpu+0x18c/0x750
> [ 0.008282] identify_secondary_cpu+0x50/0xa0
> [ 0.008282] start_secondary+0x7c/0x160
> [ 0.008282] common_startup_64+0x13e/0x141
> [ 0.008282] </TASK>
> [ 0.008282] ---[ end trace 0000000000000000 ]---
> [ 0.354753] smp: Brought up 1 node, 2 CPUs
> [ 0.354797] smpboot: Total of 2 processors activated (6666.06 BogoMIPS)
>
> Any ideas?
That's a fun one.
This looks to be this code:
pr_info("Disabled fast string operations\n");
setup_clear_cpu_cap(X86_FEATURE_REP_GOOD);
because we can see the pr_info() and I'm assuming that the 'feature' is
X86_FEATURE_REP_GOOD (0x70) which we can see in RSI/RBP.
But X86_FEATURE_REP_GOOD isn't even a real CPU feature, it's one of the
synthetic ones. The only way I can see this happening is if
MSR_IA32_MISC_ENABLE_FAST_STRING is mismatched between the boot CPU and
a secondary.
Could you boot the system on a known good kernel and run this, please?
rdmsr -a 0x000001a0
That'll dump out MSR_IA32_MISC_ENABLE on all the CPUs.
When was the last kernel that worked for you? Also, do you have old
microcode? Can you dump the beginning of /proc/cpuinfo, please?
processor : 21
vendor_id : GenuineIntel
cpu family : 6
model : 170
model name : Intel(R) Core(TM) Ultra 7 155H
stepping : 4
microcode : 0x24
I can see your microcode version in dmesg, but not the cpu
model/family/stepping.
next prev parent reply other threads:[~2025-10-17 14:26 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-17 14:05 Salvatore Bonaccorso
2025-10-17 14:26 ` Dave Hansen [this message]
2025-10-17 21:02 ` Laurențiu Păncescu
[not found] ` <45a02791-dcb9-4d70-ad77-4fdcbf556c15@intel.com>
2025-10-17 22:44 ` Sohil Mehta
2025-11-27 12:37 ` Dominik 'Rathann' Mierzejewski
2025-12-01 17:54 ` Dave Hansen
2025-12-01 20:29 ` Dominik 'Rathann' Mierzejewski
2025-10-17 15:36 ` Andi Kleen
2025-10-17 15:52 ` Sohil Mehta
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