From: Lars Persson <lars.persson@axis.com>
To: arm@kernel.org, linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com, linux-kernel@vger.kernel.org,
Lars Persson <larper@axis.com>
Subject: [PATCH 2/3] ARM: dts: artpec: use optimized pl310 settings
Date: Tue, 23 Aug 2016 16:00:51 +0200 [thread overview]
Message-ID: <a84983a0d19a339c1664f239c7d5725ca537eee4.1471959733.git.larper@axis.com> (raw)
In-Reply-To: <cover.1471959733.git.larper@axis.com>
In-Reply-To: <cover.1471959733.git.larper@axis.com>
Use the cache settings that were determined to give best performance
on artpec-6 typical workloads.
Signed-off-by: Lars Persson <larper@axis.com>
---
arch/arm/boot/dts/artpec6.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/artpec6.dtsi b/arch/arm/boot/dts/artpec6.dtsi
index db41b52..4e40d55 100644
--- a/arch/arm/boot/dts/artpec6.dtsi
+++ b/arch/arm/boot/dts/artpec6.dtsi
@@ -137,6 +137,13 @@
arm,data-latency = <1 1 1>;
arm,tag-latency = <1 1 1>;
arm,filter-ranges = <0x0 0x80000000>;
+ arm,double-linefill = <1>;
+ arm,double-linefill-incr = <0>;
+ arm,double-linefill-wrap = <0>;
+ prefetch-data = <1>;
+ prefetch-instr = <1>;
+ arm,prefetch-offset = <0>;
+ arm,prefetch-drop = <1>;
};
pmu {
--
2.1.4
next prev parent reply other threads:[~2016-08-23 14:02 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-23 14:00 [PATCH 0/3] ARM: dts: artpec6.dtsi updates Lars Persson
2016-08-23 14:00 ` [PATCH 1/3] ARM: dts: artpec: use clock binding header Lars Persson
2016-08-23 14:00 ` Lars Persson [this message]
2016-08-23 14:00 ` [PATCH 3/3] ARM: dts: artpec: set irq affinity on pmu interrupts Lars Persson
2016-09-13 14:05 ` [PATCH 0/3] ARM: dts: artpec6.dtsi updates Arnd Bergmann
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