From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Fuad Tabba <fuad.tabba@linux.dev>, Marc Zyngier <maz@kernel.org>,
Oliver Upton <oupton@kernel.org>,
kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Joey Gouly <joey.gouly@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Steffen Eiden <seiden@linux.ibm.com>,
Mark Rutland <mark.rutland@arm.com>,
Yicong Yang <yangyicong@hisilicon.com>,
Zhou Wang <wangzhou1@hisilicon.com>,
Arnd Bergmann <arnd@arndb.de>, Fuad Tabba <tabba@google.com>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 3/5] KVM: arm64: Add context-switch of ACCDATA_EL1
Date: Mon, 26 Oct 2026 15:41:41 +0000 [thread overview]
Message-ID: <a86348e5-a55a-4a99-a3c6-24b3213ed3d1@arm.com> (raw)
In-Reply-To: <20261025075138.2919734-4-fuad.tabba@linux.dev>
Hi Fuad
On 25/10/2026 07:51, Fuad Tabba wrote:
> From: Marc Zyngier <maz@kernel.org>
>
> Add ACCDATA_EL1 save/restore as part of the EL0 context. This is
> conditioned on the guest's view of ID_AA64ISAR1_EL1.LS64 reporting
> that this register is supported.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> Fixes: 58ce78667a641 ("arm64: Add support for FEAT_{LS64, LS64_V}")
> Link: https://lore.kernel.org/r/20240815125959.2097734-5-maz@kernel.org
> Cc: stable@vger.kernel.org
> [Fuad: rebased; switch ACCDATA_EL1 for guests only, as the host never
> uses it; gate it on a new ARM64_HAS_LS64_ACCDATA capability, since
> in pKVM the host controls a non-protected guest's ID registers, and
> an EL2 access to ACCDATA_EL1 on a CPU without the feature is UNDEFINED]
> Signed-off-by: Fuad Tabba <fuad.tabba@linux.dev>
> ---
> arch/arm64/kernel/cpufeature.c | 7 +++++++
> arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 23 ++++++++++++++++++++++
> arch/arm64/tools/cpucaps | 1 +
> 3 files changed, 31 insertions(+)
>
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index 32102c3912fa7..b5720c56eebc9 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -3225,6 +3225,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
> .cpu_enable = cpu_enable_ls64_v,
> ARM64_CPUID_FIELDS(ID_AA64ISAR1_EL1, LS64, LS64_V)
> },
> + {
> + .desc = "LS64_ACCDATA",
> + .capability = ARM64_HAS_LS64_ACCDATA,
> + .type = ARM64_CPUCAP_SYSTEM_FEATURE,
> + .matches = has_cpuid_feature,
> + ARM64_CPUID_FIELDS(ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA)
> + },
> #ifdef CONFIG_ARM64_LSUI
> {
> .desc = "Unprivileged Load Store Instructions (LSUI)",
> diff --git a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h
> index c382848d31947..4a008c8a696ba 100644
> --- a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h
> +++ b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h
> @@ -17,6 +17,7 @@
> #include <asm/kvm_mmu.h>
>
> static inline bool ctxt_has_s1poe(struct kvm_cpu_context *ctxt);
> +static inline bool ctxt_has_accdata(struct kvm_cpu_context *ctxt);
>
> static inline struct kvm_vcpu *ctxt_to_vcpu(struct kvm_cpu_context *ctxt)
> {
> @@ -67,6 +68,13 @@ static inline void __sysreg_save_user_state(struct kvm_cpu_context *ctxt)
> {
> ctxt_sys_reg(ctxt, TPIDR_EL0) = read_sysreg(tpidr_el0);
> ctxt_sys_reg(ctxt, TPIDRRO_EL0) = read_sysreg(tpidrro_el0);
> +
> + /*
> + * Despite the appearances, ACCDATA_EL1 is part of the EL0
> + * context, as it can only be used using ST64BV0.
> + */
> + if (ctxt_has_accdata(ctxt))
> + ctxt_sys_reg(ctxt, ACCDATA_EL1) = read_sysreg_s(SYS_ACCDATA_EL1);
> }
>
> static inline bool ctxt_has_mte(struct kvm_cpu_context *ctxt)
> @@ -131,6 +139,18 @@ static inline bool ctxt_has_sctlr2(struct kvm_cpu_context *ctxt)
> return kvm_has_sctlr2(kern_hyp_va(vcpu->kvm));
> }
>
> +static inline bool ctxt_has_accdata(struct kvm_cpu_context *ctxt)
> +{
> + struct kvm_vcpu *vcpu;
> +
> + /* The host never uses ACCDATA_EL1 */
> + if (!cpus_have_final_cap(ARM64_HAS_LS64_ACCDATA) || !ctxt_is_guest(ctxt))
> + return false;
> +
> + vcpu = ctxt_to_vcpu(ctxt);
> + return kvm_has_feat(kern_hyp_va(vcpu->kvm), ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA);
minor nit: Aligning with the other kvm_has_feat() usecsaes, should we
wrap this under kvm_has_accdata() (with moving the cpus_have_final_cap()
to the wrapper ?)
Otherwise looks good to me.
Suzuki
> +}
> +
> static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt)
> {
> ctxt_sys_reg(ctxt, SCTLR_EL1) = read_sysreg_el1(SYS_SCTLR);
> @@ -210,6 +230,9 @@ static inline void __sysreg_restore_user_state(struct kvm_cpu_context *ctxt)
> {
> write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL0), tpidr_el0);
> write_sysreg(ctxt_sys_reg(ctxt, TPIDRRO_EL0), tpidrro_el0);
> +
> + if (ctxt_has_accdata(ctxt))
> + write_sysreg_s(ctxt_sys_reg(ctxt, ACCDATA_EL1), SYS_ACCDATA_EL1);
> }
>
> static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt,
> diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
> index 2775ba3359cfe..f01719bbd6037 100644
> --- a/arch/arm64/tools/cpucaps
> +++ b/arch/arm64/tools/cpucaps
> @@ -49,6 +49,7 @@ HAS_LPA2
> HAS_LSE_ATOMICS
> HAS_LS64
> HAS_LS64_V
> +HAS_LS64_ACCDATA
> HAS_LSUI
> HAS_MOPS
> HAS_NESTED_VIRT
next prev parent reply other threads:[~2026-10-26 15:41 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-25 7:51 [PATCH v2 0/5] KVM: arm64: Support FEAT_LS64_ACCDATA in guests Fuad Tabba
2026-10-25 7:51 ` [PATCH v2 1/5] arm64: Add override for ID_AA64ISAR1_EL1.LS64 Fuad Tabba
2026-10-25 7:51 ` [PATCH v2 2/5] KVM: arm64: Add ACCDATA_EL1 to the sysreg array Fuad Tabba
2026-10-25 7:51 ` [PATCH v2 3/5] KVM: arm64: Add context-switch of ACCDATA_EL1 Fuad Tabba
2026-10-26 15:41 ` Suzuki K Poulose [this message]
2026-10-26 17:09 ` Fuad Tabba
2026-10-26 17:32 ` Arnd Bergmann
2026-10-26 18:54 ` Fuad Tabba
2026-10-25 7:51 ` [PATCH v2 4/5] KVM: arm64: Enable ST64BV0 for guests with FEAT_LS64_ACCDATA Fuad Tabba
2026-10-25 7:51 ` [PATCH v2 5/5] KVM: arm64: selftests: Add ACCDATA_EL1 to get-reg-list Fuad Tabba
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=a86348e5-a55a-4a99-a3c6-24b3213ed3d1@arm.com \
--to=suzuki.poulose@arm.com \
--cc=arnd@arndb.de \
--cc=catalin.marinas@arm.com \
--cc=fuad.tabba@linux.dev \
--cc=joey.gouly@arm.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.linux.dev \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=oupton@kernel.org \
--cc=seiden@linux.ibm.com \
--cc=tabba@google.com \
--cc=wangzhou1@hisilicon.com \
--cc=will@kernel.org \
--cc=yangyicong@hisilicon.com \
--cc=yuzenghui@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®