From: Xin Li <xin@zytor.com>
To: Borislav Petkov <bp@kernel.org>, X86 ML <x86@kernel.org>
Cc: LKML <linux-kernel@vger.kernel.org>,
"Borislav Petkov (AMD)" <bp@alien8.de>
Subject: Re: [PATCH] x86/cpufeatures: Clean up formatting
Date: Thu, 10 Apr 2025 10:11:56 -0700 [thread overview]
Message-ID: <a8782d3a-9c22-48c3-916f-29babc58db5f@zytor.com> (raw)
In-Reply-To: <20250410165434.20648-1-bp@kernel.org>
On 4/10/2025 9:54 AM, Borislav Petkov wrote:
> @@ -477,10 +477,10 @@
> #define X86_FEATURE_BHI_CTRL (21*32+ 2) /* BHI_DIS_S HW control available */
> #define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* BHI_DIS_S HW control enabled */
> #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */
> -#define X86_FEATURE_AMD_FAST_CPPC (21*32 + 5) /* Fast CPPC */
> -#define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */
> -#define X86_FEATURE_AMD_WORKLOAD_CLASS (21*32 + 7) /* Workload Classification */
> -#define X86_FEATURE_PREFER_YMM (21*32 + 8) /* Avoid ZMM registers due to downclocking */
> +#define X86_FEATURE_AMD_FAST_CPPC (21*32+ 5) /* Fast CPPC */
> +#define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32+ 6) /* Heterogeneous Core Topology */
> +#define X86_FEATURE_AMD_WORKLOAD_CLASS (21*32+ 7) /* Workload Classification */
> +#define X86_FEATURE_PREFER_YMM (21*32+ 8) /* Avoid ZMM registers due to downclocking */
Ha, I did a similar cleanup with adding the immediate MSR instruction
support (you asked to use scattered):
https://lore.kernel.org/lkml/20250331082251.3171276-9-xin@zytor.com/
Thanks!
Xin
next prev parent reply other threads:[~2025-04-10 17:12 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-10 16:54 Borislav Petkov
2025-04-10 17:11 ` Xin Li [this message]
2025-04-10 17:25 ` Borislav Petkov
2025-04-10 17:52 ` Xin Li
2025-04-10 18:05 ` Borislav Petkov
2025-04-10 18:15 ` Xin Li
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