From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A96D525B2F4 for ; Wed, 1 Jul 2026 13:56:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782914187; cv=none; b=lmuQnFOqqiNKk6EP60Pd3NmU9fajCI5sDpKLf/hj6istZyWKOphy9wkq7atUqxV7Ozm6zpHoewm+hP0dC+jM0Wn1PIpwWN2aUs87vSFCO3Vucx5Mq6zbOjeCIwFIsiVIVo3P1ztmicn2Yh0+qFEm161lzuUqNNEnIHE1VdWazx0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782914187; c=relaxed/simple; bh=v2+kARdeyN4IRiKPcyZSJQE08upldUb/8S1aEZl1YPw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=HDZMHm63XK/wW+fVQwLilio9JeDkAx5vI9EEeqkIVCMxWFHEfFc6ZKAxk0MC7b25BSMTvTwJqVAgab2NT26W9CAObHCSJaO8ubKOzTL3bvxvDSKofQwIjog+g4TilUziAtCcDROwa9yslkbI+4aiG1eO5tK1nLCMEi4EVc6SuRE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=a42dOSxE; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="a42dOSxE" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1782914186; x=1814450186; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=v2+kARdeyN4IRiKPcyZSJQE08upldUb/8S1aEZl1YPw=; b=a42dOSxEkwsWIQfMwosUUsFfpUyizvCMcIfYyAySSL0SkC70uhhD1SFk TbBkwcOZqsprizpetF1IlTilz6UGtNJ4FJwIebwNhSZ+yPTJeURucDBrg 5UBpYYG0YKKP1lCHBX8M8Jzmop40AXN9UEtjTTtBBptaPL8BPNcX4a8hL V44ESIMf1TVJS58Y1sGdsOJVJUu+BZO0K0uXHZ8PGcoCam8zY7iFGUyG4 fNt3pt+RlIaYVCBTNtMZWWf5h68LddJJp7W3Z0qYM6xvgHck8eUksCUJR DtLVLvI+z8yyA/RpFwQa4/cTKRIVGT2OL3kT6UEl2WXTK0Xs1o1qT86gp Q==; X-CSE-ConnectionGUID: I5JASY1SQiqLVDtS4JUOrQ== X-CSE-MsgGUID: bnkmRhzYSqq/XkYqc2oCyg== X-IronPort-AV: E=McAfee;i="6800,10657,11833"; a="83422114" X-IronPort-AV: E=Sophos;i="6.25,141,1779174000"; d="scan'208";a="83422114" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jul 2026 06:56:26 -0700 X-CSE-ConnectionGUID: JZG+kofWR0S4dCAJb9Zh/Q== X-CSE-MsgGUID: IvafLtOzSISXK/nW1Erpbg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,141,1779174000"; d="scan'208";a="257475194" Received: from chenyu-dev.sh.intel.com ([10.239.62.107]) by fmviesa005.fm.intel.com with ESMTP; 01 Jul 2026 06:56:20 -0700 From: Chen Yu To: tony.luck@intel.com, reinette.chatre@intel.com Cc: x86@kernel.org, linux-kernel@vger.kernel.org, tglx@kernel.org, bp@alien8.de, mingo@redhat.com, dave.hansen@linux.intel.com, hpa@zytor.com, fenghuay@nvidia.com, babu.moger@amd.com, anil.keshavamurthy@broadcom.com, chen.yu@linux.dev, Chen Yu , Hongyu Ning Subject: [PATCH v5 05/10] x86/resctrl: Parse ACPI CMRC table Date: Wed, 1 Jul 2026 21:46:21 +0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The CMRC (Cache Monitoring Registers for CPU Agents Description) sub-table of ERDT describes the MMIO registers used to read cache monitoring counters (e.g. LLC occupancy) for an RMD. Parse each CMRC sub-table, ioremap its register window, and save the CMRC pointer in the corresponding ERDT domain entry so that later monitoring code can read the counters via MMIO. Suggested-by: Tony Luck Reviewed-by: Thomas Gleixner Tested-by: Hongyu Ning Signed-off-by: Chen Yu --- v4->v5: No change. --- arch/x86/kernel/cpu/resctrl/erdt.c | 44 ++++++++++++++++++++++++++ arch/x86/kernel/cpu/resctrl/internal.h | 1 + 2 files changed, 45 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/erdt.c b/arch/x86/kernel/cpu/resctrl/erdt.c index 6c1df7e43eab..a5754d64fcc1 100644 --- a/arch/x86/kernel/cpu/resctrl/erdt.c +++ b/arch/x86/kernel/cpu/resctrl/erdt.c @@ -26,6 +26,7 @@ static LIST_HEAD(domain_info_list); static bool __erdt_enabled; #define ERDT_VALID_VERSION 1 +#define CMRC_SUPPORTED_INDEX_FN 1 #define RMDD_FLAG_CPU_L3_DOMAIN BIT(0) /* Bitmask of valid sub-tables found in the first RMDD, used to ensure all RMDDs match. */ @@ -79,6 +80,7 @@ static void cleanup_one_domain(struct erdt_domain_info *d) { erdt_iounmap_domain(d); free_cpumask_var(d->cpu_mask); + kfree(d->cmrc); kfree(d); } @@ -112,6 +114,41 @@ static __init int cacd_init(struct acpi_subtbl_hdr_16 *subtbl, return 0; } +static __init int cmrc_init(struct acpi_subtbl_hdr_16 *subtbl, + struct erdt_domain_info *domain_info) +{ + struct acpi_erdt_cmrc *cmrc = (struct acpi_erdt_cmrc *)subtbl; + + if (subtbl->length < sizeof(*cmrc)) { + pr_warn(FW_BUG "Truncated CMRC subtable\n"); + return -EIO; + } + + if (cmrc->index_fn != CMRC_SUPPORTED_INDEX_FN) { + pr_info("Unsupported CMRC index function %d\n", cmrc->index_fn); + return -EIO; + } + + if (!cmrc->clump_size) { + pr_warn(FW_BUG "CMRC clump_size is zero\n"); + return -EIO; + } + + domain_info->base[ERDT_MMIO_CMRC_BASE] = + erdt_ioremap(cmrc->cmt_reg_base, cmrc->cmt_reg_size, "CMRC base"); + if (!domain_info->base[ERDT_MMIO_CMRC_BASE]) + return -EIO; + + domain_info->cmrc = kmemdup(cmrc, subtbl->length, GFP_KERNEL); + if (!domain_info->cmrc) { + iounmap(domain_info->base[ERDT_MMIO_CMRC_BASE]); + domain_info->base[ERDT_MMIO_CMRC_BASE] = NULL; + return -ENOMEM; + } + + return 0; +} + static inline struct acpi_subtbl_hdr_16 *rmdd_subtbl(struct acpi_erdt_rmdd *rmdd) { return (void *)rmdd + sizeof(*rmdd); @@ -178,6 +215,13 @@ static __init bool parse_rmdd_entry(struct acpi_subtbl_hdr_16 *rmdd_hdr) goto cleanup; subtbl_mask |= BIT(ACPI_ERDT_TYPE_CACD); + break; + case ACPI_ERDT_TYPE_CMRC: + /* TBD: Only 1 CMRR per domain is allowed? */ + if (!(subtbl_mask & BIT(ACPI_ERDT_TYPE_CMRC)) && + !cmrc_init(subtbl, domain_info)) + subtbl_mask |= BIT(ACPI_ERDT_TYPE_CMRC); + break; default: break; diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index 7d9100b7648f..3dab05c38003 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -36,6 +36,7 @@ enum erdt_mmio_type { struct erdt_domain_info { void __iomem *base[ERDT_MMIO_NUM_TYPES]; + struct acpi_erdt_cmrc *cmrc; cpumask_var_t cpu_mask; int max_rmid; struct list_head list; -- 2.45.2