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[82.192.128.231]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4bb4e26700fsm70550895e9.10.2026.11.12.03.06.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 12 Nov 2026 03:06:50 -0800 (PST) Message-ID: Date: Thu, 12 Nov 2026 12:06:49 +0100 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net] net: ag71xx: let both QCA9550 MACs use MII, RGMII and SGMII To: Rosen Penev , netdev@vger.kernel.org Cc: Chris Snook , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Russell King , Oleksij Rempel , open list References: <20261106221607.16215-1-rosenp@gmail.com> Content-Language: en-US From: Paolo Abeni In-Reply-To: <20261106221607.16215-1-rosenp@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 11/6/26 23:16, Rosen Penev wrote: > The GE0_SGMII bit of the QCA955x ETH_CFG register selects which GMAC > gets the SerDes (QCA9558 datasheet, 10.8.1): when it is clear, GMAC0 > connects as RGMII/MII and GMAC1 as SGMII, and when it is set, the other > way around. The driver only allows the second layout, with SGMII on > GMAC0 and RGMII/MII on GMAC1, but boards like the TP-Link Archer C7 > use the first one, with GMAC0 on RGMII. > > Allow MII, RGMII and SGMII on both MACs. > > Tested on Archer C7 v2. RGMII on port 0 of the switch works. > > Fixes: 0767ec042897 ("net: ag71xx: extend link validation to support other SoCs") > Signed-off-by: Rosen Penev IMHO this is not net material. Applying to net-next. /P