From: Vince Weaver <vincent.weaver@maine.edu>
To: "Liang, Kan" <kan.liang@linux.intel.com>
Cc: Stephane Eranian <eranian@google.com>,
Vince Weaver <vincent.weaver@maine.edu>,
LKML <linux-kernel@vger.kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>
Subject: Re: [perf] perf_fuzzer causes unchecked MSR access error
Date: Wed, 3 Mar 2021 15:22:57 -0500 (EST) [thread overview]
Message-ID: <a8cebd2-a0fe-2ade-30d6-d592b3423db@maine.edu> (raw)
In-Reply-To: <9df5f72d-a959-fe46-400a-7dca6c596478@linux.intel.com>
On Wed, 3 Mar 2021, Liang, Kan wrote:
> We never use bit 58. It should be a new issue.
> Is it repeatable?
yes, it's repeatable.
(which I'm glad to see because it looks suspiciously like a memory bit
flip)
Though since it's a WARN_ONCE I have to reboot each time I want to test.
If I get a chance I'll try to come up with a reduced test case but
probably won't have time for that today.
Vince
next prev parent reply other threads:[~2021-03-04 0:03 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-28 14:25 [perf] perf_fuzzer causes crash in intel_pmu_drain_pebs_nhm() Vince Weaver
2021-01-28 19:49 ` Vince Weaver
2021-02-11 14:53 ` Peter Zijlstra
2021-02-11 21:37 ` Liang, Kan
2021-02-11 22:14 ` Vince Weaver
2021-02-25 20:15 ` Liang, Kan
2021-03-01 13:20 ` Liang, Kan
2021-03-02 5:29 ` Vince Weaver
2021-03-03 18:16 ` [perf] perf_fuzzer causes unchecked MSR access error Vince Weaver
2021-03-03 19:28 ` Stephane Eranian
2021-03-03 20:00 ` Liang, Kan
2021-03-03 20:22 ` Vince Weaver [this message]
2021-03-04 19:33 ` Liang, Kan
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