From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759176AbdACNv7 (ORCPT ); Tue, 3 Jan 2017 08:51:59 -0500 Received: from smtprelay.synopsys.com ([198.182.60.111]:43660 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759143AbdACNvJ (ORCPT ); Tue, 3 Jan 2017 08:51:09 -0500 Subject: Re: [PATCH v2 2/3] dmaeninge: xilinx_dma: Fix bug in multiple frame stores scenario in vdma To: Appana Durga Kedareswara Rao , Jose Abreu , "dan.j.williams@intel.com" , "vinod.koul@intel.com" , "michal.simek@xilinx.com" , Soren Brinkmann , "moritz.fischer@ettus.com" , "laurent.pinchart@ideasonboard.com" , "luis@debethencourt.com" References: <1482483135-14767-1-git-send-email-appanad@xilinx.com> <1482483135-14767-3-git-send-email-appanad@xilinx.com> <45807619-bf6a-0174-c102-12c03aeb575c@synopsys.com> CC: "dmaengine@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" From: Jose Abreu Message-ID: Date: Tue, 3 Jan 2017 13:51:03 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.107.19.53] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Kedar, On 02-01-2017 16:00, Appana Durga Kedareswara Rao wrote: > Hi Jose Miguel Abreu, > > Thanks for the review... > > [snip]... >> I just noticed there is a write to XILINX_DMA_REG_FRMSTORE which, by the >> description in the VDMA databook, allows to modify the total number of >> framebuffers. >> >> Does it correct this situation: Lets assume VDMA has 10 framebuffers in HW and >> user only submits 5 descriptors. Then vsize will be programmed and VDMA will >> start. The VDMA will start in fb 1, then 2, ... until 5 its all ok. But then after the fb >> 5 the VDMA will jump to fb 6, this fb will have no address because the user only >> submitted 5 addresses so VDMA will try to write to location 0x0 of system mem >> (if using S2MM channel). ? >> >> If so then there is no race condition, but the HW image that I have does not >> have this register enabled so I was getting this result (memory corruption >> because not all framebuffers had addresses set). > Thanks for the explanation. > Agree the issue that you mentioned won't come when XILINX_DMA_REG_FRMSTORE > (C_ENABLE_DEBUG_INFO_5 and C_ENABLE_DEBUG_INFO_13) Register is enabled in the IP. > But this register won't get enabled with the default IP configuration (C_ENABLE_DEBUG_INFO_5 and C_ENABLE_DEBUG_INFO_13). > > When user is not enabled XILINX_DMA_REG_FRMSTORE in the h/w and submits frames less than h/w capable. > The solution that I am thinking is to throw an error in the driver saying that either enable the > num frame store feature in the IP or submit the frames up to h/w capable what do you think??? Sounds fine by me. Best regards, Jose Miguel Abreu > > Regards, > Kedar. > >> Best regards, >> Jose Miguel Abreu >> >>> Regards, >>> Kedar. >>> >>>> Best regards, >>>> Jose Miguel Abreu >>>>