Re: [PATCH 0/3] arm64: perf: Add support for Perf NMI interrupts

[Alexandru Elisei <alexandru.elisei@arm.com>]

Hi,

On 5/18/20 11:45 AM, Mark Rutland wrote:
> Hi all,
>
> On Mon, May 18, 2020 at 02:26:00PM +0800, Lecopzer Chen wrote:
>> HI Sumit,
>>
>> Thanks for your information.
>>
>> I've already implemented IPI (same as you did [1], little difference
>> in detail), hardlockup detector and perf in last year(2019) for
>> debuggability.
>> And now we tend to upstream to reduce kernel maintaining effort.
>> I'm glad if someone in ARM can do this work :)
>>
>> Hi Julien,
>>
>> Does any Arm maintainers can proceed this action?
> Alexandru (Cc'd) has been rebasing and reworking Julien's patches, which
> is my preferred approach.
>
> I understand that's not quite ready for posting since he's investigating
> some of the nastier subtleties (e.g. mutual exclusion with the NMI), but
> maybe we can put the work-in-progress patches somewhere in the mean
> time.
>
> Alexandru, do you have an idea of what needs to be done, and/or when you
> expect you could post that?

I'm currently working on rebasing the patches on top of 5.7-rc5, when I have
something usable I'll post a link (should be a couple of days). After that I will
address the review comments, and I plan to do a thorough testing because I'm not
100% confident that some of the assumptions around the locks that were removed are
correct. My guess is this will take a few weeks.

Thanks,
Alex
>
> Thanks,
> Mark.
>
>> This is really useful in debugging.
>> Thank you!!
>>
>>
>>
>> [1] https://lkml.org/lkml/2020/4/24/328
>>
>>
>> Lecopzer
>>
>> Sumit Garg <sumit.garg@linaro.org> 於 2020年5月18日 週一 下午1:46寫道：
>>> + Julien
>>>
>>> Hi Lecopzer,
>>>
>>> On Sat, 16 May 2020 at 18:20, Lecopzer Chen <lecopzer@gmail.com> wrote:
>>>> These series implement Perf NMI funxtionality and depends on
>>>> Pseudo NMI [1] which has been upstreamed.
>>>>
>>>> In arm64 with GICv3, Pseudo NMI was implemented for NMI-like interruts.
>>>> That can be extended to Perf NMI which is the prerequisite for hard-lockup
>>>> detector which had already a standard interface inside Linux.
>>>>
>>>> Thus the first step we need to implement perf NMI interface and make sure
>>>> it works fine.
>>>>
>>> This is something that is already implemented via Julien's patch-set
>>> [1]. Its v4 has been floating since July, 2019 and I couldn't find any
>>> major blocking comments but not sure why things haven't progressed
>>> further.
>>>
>>> Maybe Julien or Arm maintainers can provide updates on existing
>>> patch-set [1] and how we should proceed further with this interesting
>>> feature.
>>>
>>> And regarding hard-lockup detection, I have been able to enable it
>>> based on perf NMI events using Julien's perf patch-set [1]. Have a
>>> look at the patch here [2].
>>>
>>> [1] https://patchwork.kernel.org/cover/11047407/
>>> [2] http://lists.infradead.org/pipermail/linux-arm-kernel/2020-May/732227.html
>>>
>>> -Sumit
>>>
>>>> Perf NMI has been test by dd if=/dev/urandom of=/dev/null like the link [2]
>>>> did.
>>>>
>>>> [1] https://lkml.org/lkml/2019/1/31/535
>>>> [2] https://www.linaro.org/blog/debugging-arm-kernels-using-nmifiq
>>>>
>>>>
>>>> Lecopzer Chen (3):
>>>>   arm_pmu: Add support for perf NMI interrupts registration
>>>>   arm64: perf: Support NMI context for perf event ISR
>>>>   arm64: Kconfig: Add support for the Perf NMI
>>>>
>>>>  arch/arm64/Kconfig             | 10 +++++++
>>>>  arch/arm64/kernel/perf_event.c | 36 ++++++++++++++++++------
>>>>  drivers/perf/arm_pmu.c         | 51 ++++++++++++++++++++++++++++++----
>>>>  include/linux/perf/arm_pmu.h   |  6 ++++
>>>>  4 files changed, 88 insertions(+), 15 deletions(-)
>>>>
>>>> --
>>>> 2.25.1
>>>>
>>>>
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