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From: "CK Hu (胡俊光)" <ck.hu@mediatek.com>
To: "Shawn Sung (宋孝謙)" <Shawn.Sung@mediatek.com>,
	"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>
Cc: "linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Bibby Hsieh (謝濟遠)" <Bibby.Hsieh@mediatek.com>,
	"jason-ch.chen@mediatek.corp-partner.google.com"
	<jason-ch.chen@mediatek.corp-partner.google.com>,
	"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
	"daniel@ffwll.ch" <daniel@ffwll.ch>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"airlied@gmail.com" <airlied@gmail.com>,
	"sean@poorly.run" <sean@poorly.run>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"fshao@chromium.org" <fshao@chromium.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"angelogioacchino.delregno@collabora.com"
	<angelogioacchino.delregno@collabora.com>
Subject: Re: [PATCH v9 16/21] drm/mediatek: Support "Pre-multiplied" blending in OVL
Date: Fri, 14 Jun 2024 05:42:01 +0000	[thread overview]
Message-ID: <a966988a520adc5aee5ee70657efd778d011ded0.camel@mediatek.com> (raw)
In-Reply-To: <20240614024620.19011-17-shawn.sung@mediatek.com>

On Fri, 2024-06-14 at 10:46 +0800, Shawn Sung wrote:
> From: Hsiao Chien Sung <shawn.sung@mediatek.com>
> 
> Support "Pre-multiplied" alpha blending mode on in OVL.
> Before this patch, only the "coverage" mode is supported.
> 
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 42 ++++++++++++++++++++-----
>  1 file changed, 34 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index 6567806cf4e2..47d0b039a616 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -52,8 +52,12 @@
>  #define GMC_THRESHOLD_HIGH	((1 << GMC_THRESHOLD_BITS) / 4)
>  #define GMC_THRESHOLD_LOW	((1 << GMC_THRESHOLD_BITS) / 8)
>  
> +#define OVL_CON_CLRFMT_MAN	BIT(23)
>  #define OVL_CON_BYTE_SWAP	BIT(24)
> -#define OVL_CON_MTX_YUV_TO_RGB	(6 << 16)
> +
> +/* OVL_CON_RGB_SWAP works only if OVL_CON_CLRFMT_MAN is enabled */
> +#define OVL_CON_RGB_SWAP	BIT(25)
> +
>  #define OVL_CON_CLRFMT_RGB	(1 << 12)
>  #define OVL_CON_CLRFMT_ARGB8888	(2 << 12)
>  #define OVL_CON_CLRFMT_RGBA8888	(3 << 12)
> @@ -61,6 +65,11 @@
>  #define OVL_CON_CLRFMT_BGRA8888	(OVL_CON_CLRFMT_ARGB8888 | OVL_CON_BYTE_SWAP)
>  #define OVL_CON_CLRFMT_UYVY	(4 << 12)
>  #define OVL_CON_CLRFMT_YUYV	(5 << 12)
> +#define OVL_CON_MTX_YUV_TO_RGB	(6 << 16)
> +#define OVL_CON_CLRFMT_PARGB8888 ((3 << 12) | OVL_CON_CLRFMT_MAN)

#define OVL_CON_CLRFMT_PARGB8888 (OVL_CON_CLRFMT_RGBA8888 | OVL_CON_CLRFMT_MAN)

But I'm confused with the naming.


> +#define OVL_CON_CLRFMT_PABGR8888 (OVL_CON_CLRFMT_PARGB8888 | OVL_CON_RGB_SWAP)

#define OVL_CON_CLRFMT_PABGR8888 (OVL_CON_CLRFMT_ABGR8888 | OVL_CON_CLRFMT_MAN)

> +#define OVL_CON_CLRFMT_PBGRA8888 (OVL_CON_CLRFMT_PARGB8888 | OVL_CON_BYTE_SWAP)

#define OVL_CON_CLRFMT_PBGRA8888 (OVL_CON_CLRFMT_BGRA8888 | OVL_CON_CLRFMT_MAN)

> +#define OVL_CON_CLRFMT_PRGBA8888 (OVL_CON_CLRFMT_PABGR8888 | OVL_CON_BYTE_SWAP)
>  #define OVL_CON_CLRFMT_RGB565(ovl)	((ovl)->data->fmt_rgb565_is_0 ? \
>  					0 : OVL_CON_CLRFMT_RGB)
>  #define OVL_CON_CLRFMT_RGB888(ovl)	((ovl)->data->fmt_rgb565_is_0 ? \
> @@ -74,6 +83,8 @@
>  #define	OVL_CON_VIRT_FLIP	BIT(9)
>  #define	OVL_CON_HORZ_FLIP	BIT(10)
>  
> +#define OVL_COLOR_ALPHA		GENMASK(31, 24)
> +
>  static inline bool is_10bit_rgb(u32 fmt)
>  {
>  	switch (fmt) {
> @@ -298,7 +309,13 @@ void mtk_ovl_config(struct device *dev, unsigned int w,
>  	if (w != 0 && h != 0)
>  		mtk_ddp_write_relaxed(cmdq_pkt, h << 16 | w, &ovl->cmdq_reg, ovl->regs,
>  				      DISP_REG_OVL_ROI_SIZE);
> -	mtk_ddp_write_relaxed(cmdq_pkt, 0x0, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_ROI_BGCLR);
> +
> +	/*
> +	 * The background color must be opaque black (ARGB),
> +	 * otherwise the alpha blending will have no effect
> +	 */
> +	mtk_ddp_write_relaxed(cmdq_pkt, OVL_COLOR_ALPHA, &ovl->cmdq_reg,
> +			      ovl->regs, DISP_REG_OVL_ROI_BGCLR);

The coverage mode formula is:
dst.RGB = src.RGB * src.A + dst.RGB * (1 - src.A)

The pre-multiplied mode formula is:
dst.RGB = src.RGB + dst.RGB * (1 - src.A)

Both formula has no destination alpha (I think background color is last destination),
why coverage mode work fine but pre-multiplied mode has something wrong?

Regards,
CK

>  
>  	mtk_ddp_write(cmdq_pkt, 0x1, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RST);
>  	mtk_ddp_write(cmdq_pkt, 0x0, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RST);
> @@ -374,7 +391,8 @@ void mtk_ovl_layer_off(struct device *dev, unsigned int idx,
>  		      DISP_REG_OVL_RDMA_CTRL(idx));
>  }
>  
> -static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt)
> +static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt,
> +				    unsigned int blend_mode)
>  {
>  	/* The return value in switch "MEM_MODE_INPUT_FORMAT_XXX"
>  	 * is defined in mediatek HW data sheet.
> @@ -395,22 +413,30 @@ static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt)
>  	case DRM_FORMAT_RGBA8888:
>  	case DRM_FORMAT_RGBX1010102:
>  	case DRM_FORMAT_RGBA1010102:
> -		return OVL_CON_CLRFMT_RGBA8888;
> +		return blend_mode == DRM_MODE_BLEND_COVERAGE ?
> +		       OVL_CON_CLRFMT_RGBA8888 :
> +		       OVL_CON_CLRFMT_PRGBA8888;
>  	case DRM_FORMAT_BGRX8888:
>  	case DRM_FORMAT_BGRA8888:
>  	case DRM_FORMAT_BGRX1010102:
>  	case DRM_FORMAT_BGRA1010102:
> -		return OVL_CON_CLRFMT_BGRA8888;
> +		return blend_mode == DRM_MODE_BLEND_COVERAGE ?
> +		       OVL_CON_CLRFMT_BGRA8888 :
> +		       OVL_CON_CLRFMT_PBGRA8888;
>  	case DRM_FORMAT_XRGB8888:
>  	case DRM_FORMAT_ARGB8888:
>  	case DRM_FORMAT_XRGB2101010:
>  	case DRM_FORMAT_ARGB2101010:
> -		return OVL_CON_CLRFMT_ARGB8888;
> +		return blend_mode == DRM_MODE_BLEND_COVERAGE ?
> +		       OVL_CON_CLRFMT_ARGB8888 :
> +		       OVL_CON_CLRFMT_PARGB8888;
>  	case DRM_FORMAT_XBGR8888:
>  	case DRM_FORMAT_ABGR8888:
>  	case DRM_FORMAT_XBGR2101010:
>  	case DRM_FORMAT_ABGR2101010:
> -		return OVL_CON_CLRFMT_ABGR8888;
> +		return blend_mode == DRM_MODE_BLEND_COVERAGE ?
> +		       OVL_CON_CLRFMT_ABGR8888 :
> +		       OVL_CON_CLRFMT_PABGR8888;
>  	case DRM_FORMAT_UYVY:
>  		return OVL_CON_CLRFMT_UYVY | OVL_CON_MTX_YUV_TO_RGB;
>  	case DRM_FORMAT_YUYV:
> @@ -450,7 +476,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
>  		return;
>  	}
>  
> -	con = ovl_fmt_convert(ovl, fmt);
> +	con = ovl_fmt_convert(ovl, fmt, blend_mode);
>  	if (state->base.fb) {
>  		con |= OVL_CON_AEN;
>  		con |= state->base.alpha & OVL_CON_ALPHA;

  reply	other threads:[~2024-06-14  5:43 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-14  2:45 [PATCH v9 00/21] Support IGT in display driver Shawn Sung
2024-06-14  2:46 ` [PATCH v9 01/21] soc: mediatek: Disable 9-bit alpha in ETHDR Shawn Sung
2024-06-14  2:46 ` [PATCH v9 02/21] drm/mediatek: Add OVL compatible name for MT8195 Shawn Sung
2024-06-14  2:46 ` [PATCH v9 03/21] drm/mediatek: Add missing plane settings when async update Shawn Sung
2024-06-14  2:46 ` [PATCH v9 04/21] drm/mediatek: Add DRM_MODE_ROTATE_0 to rotation property Shawn Sung
2024-06-14  2:46 ` [PATCH v9 05/21] drm/mediatek: Set DRM mode configs accordingly Shawn Sung
2024-06-14  2:46 ` [PATCH v9 06/21] drm/mediatek: Turn off the layers with zero width or height Shawn Sung
2024-06-14  2:46 ` [PATCH v9 07/21] drm/mediatek: Support more 10bit formats in OVL Shawn Sung
2024-06-14  2:46 ` [PATCH v9 08/21] drm/mediatek: Support RGBA8888 and RGBX8888 in OVL on MT8195 Shawn Sung
2024-06-14  2:46 ` [PATCH v9 09/21] drm/mediatek: Fix XRGB setting error in OVL Shawn Sung
2024-06-14  6:06   ` CK Hu (胡俊光)
2024-06-14  2:46 ` [PATCH v9 10/21] drm/mediatek: Fix XRGB setting error in Mixer Shawn Sung
2024-06-14  3:58   ` CK Hu (胡俊光)
2024-06-14  2:46 ` [PATCH v9 11/21] drm/mediatek: Add new color format MACROs in OVL Shawn Sung
2024-06-14  4:04   ` CK Hu (胡俊光)
2024-06-14  2:46 ` [PATCH v9 12/21] drm/mediatek: Support DRM plane alpha " Shawn Sung
2024-06-14  5:06   ` CK Hu (胡俊光)
2024-06-14  2:46 ` [PATCH v9 13/21] drm/mediatek: Support DRM plane alpha in Mixer Shawn Sung
2024-06-14  5:08   ` CK Hu (胡俊光)
2024-06-14  2:46 ` [PATCH v9 14/21] drm/mediatek: Support "None" blending in OVL Shawn Sung
2024-06-14  5:11   ` CK Hu (胡俊光)
2024-06-14  2:46 ` [PATCH v9 15/21] drm/mediatek: Support "None" blending in Mixer Shawn Sung
2024-06-14  5:13   ` CK Hu (胡俊光)
2024-06-14  2:46 ` [PATCH v9 16/21] drm/mediatek: Support "Pre-multiplied" blending in OVL Shawn Sung
2024-06-14  5:42   ` CK Hu (胡俊光) [this message]
2024-06-18 17:00     ` Jason-JH Lin (林睿祥)
2024-06-19  3:17       ` CK Hu (胡俊光)
2024-06-19 16:00         ` Jason-JH Lin (林睿祥)
2024-06-14  5:49   ` CK Hu (胡俊光)
2024-06-14  2:46 ` [PATCH v9 17/21] drm/mediatek: Support "Pre-multiplied" blending in Mixer Shawn Sung
2024-06-14  5:55   ` CK Hu (胡俊光)
2024-06-14  2:46 ` [PATCH v9 18/21] drm/mediatek: Support alpha blending in display driver Shawn Sung
2024-06-14  2:46 ` [PATCH v9 19/21] drm/mediatek: Support CRC " Shawn Sung
2024-06-14  2:46 ` [PATCH v9 20/21] drm/mediatek: Support CRC in OVL Shawn Sung
2024-06-14  2:46 ` [PATCH v9 21/21] drm/mediatek: Support CRC in OVL adaptor Shawn Sung

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