From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
To: Juergen Gross <jgross@suse.com>,
linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org,
x86@kernel.org
Cc: hpa@zytor.com, tglx@linutronix.de, mingo@redhat.com
Subject: Re: [PATCH v2] xen: support 52 bit physical addresses in pv guests
Date: Tue, 31 Oct 2017 13:51:47 -0400 [thread overview]
Message-ID: <a96bcc84-e422-6610-ab9b-2ada3651b46b@oracle.com> (raw)
In-Reply-To: <20171027174937.26980-1-jgross@suse.com>
On 10/27/2017 01:49 PM, Juergen Gross wrote:
> Physical addresses on processors supporting 5 level paging can be up to
> 52 bits wide. For a Xen pv guest running on such a machine those
> physical addresses have to be supported in order to be able to use any
> memory on the machine even if the guest itself does not support 5 level
> paging.
>
> So when reading/writing a MFN from/to a pte don't use the kernel's
> PTE_PFN_MASK but a new XEN_PTE_MFN_MASK allowing full 40 bit wide MFNs.
>
> Signed-off-by: Juergen Gross <jgross@suse.com>
Applied to for-linus-4.15
-boris
prev parent reply other threads:[~2017-10-31 17:50 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-27 17:49 Juergen Gross
2017-10-27 22:33 ` Boris Ostrovsky
2017-10-31 17:51 ` Boris Ostrovsky [this message]
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