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Mon, 29 Jun 2026 02:21:29 -0700 (PDT) X-Received: by 2002:a05:6102:a4a:b0:738:b13a:c810 with SMTP id ada2fe7eead31-738b13af99bmr445045137.2.1782724889291; Mon, 29 Jun 2026 02:21:29 -0700 (PDT) Received: from [192.168.120.170] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6983a7f3989sm3836391a12.16.2026.06.29.02.21.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 29 Jun 2026 02:21:28 -0700 (PDT) Message-ID: Date: Mon, 29 Jun 2026 11:21:25 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFC v4 2/9] dt-bindings: phy: qcom-qmp: Add PHY selector and Glymur link-mode macros To: Qiang Yu Cc: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260518-link_mode_0519-v4-0-269cd73cc5d1@oss.qualcomm.com> <20260518-link_mode_0519-v4-2-269cd73cc5d1@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: 3Ysow6cEknLb7z7Bmom93oBzrsoShyGT X-Proofpoint-ORIG-GUID: 3Ysow6cEknLb7z7Bmom93oBzrsoShyGT X-Proofpoint-Spam-Info: AW1haW4tMjYwNjI5MDA3NCBTYWx0ZWRfXzLsZ3BeAdoOI GpOscVpGM+Y32V31EddLtWya3uCpJtRKfzD4DC5d3W2bLtdKlICEMJXZQbrqicK6HOgB2YTFkJg uAbqC0goVd2m2kdP8oQ+CArX16FEMjQ= X-Authority-Analysis: v=2.4 cv=HYokiCE8 c=1 sm=1 tr=0 ts=6a42391a cx=c_pps a=P2rfLEam3zuxRRdjJWA2cw==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=T8ljNkuw5NW2mJYCfz4A:9 a=QEXdDO2ut3YA:10 a=ODZdjJIeia2B_SHc_B0f:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjI5MDA3NCBTYWx0ZWRfX1TTDAzVpkzzE CkNt7tMFfUhMaP7r4w3P2CB7a/o06q501FJHePPqywJXZMypY+zCtwAHXNzgxJPi6J/UUumauHx 9hoP3G6KvI6QW2GhHfptFTOcYCGFevK8WmPaV32DbXq4hUcuSGmRflxLPhAgBYeNOta5CcAVBz0 Fjo3qZ/L8IwJRocDXFBNTf2NejXJt/6uXMQtoO3X9D+SO5WHci0DYCJ9BGigDp2WyyVj3uYVyjk vACjiRLOQRNUIaVHz69KBXQIrW3HAo8ZcdhzyEGOO5OEeM9OehiLERF0Lxf/f7gJCYrnW5s/C7U mVDqIqtgQjqLQjo8z44yQ/4ZjYkmSLrpa3ETiJASpoX2/YAwu3za3FIUbmj9C7ek4S05NOXKeN9 an1Ol6jzt92/nY33F3bNs0GJADm1HFWvZdczQt/hHfagMFSoeTj7fXyULLB16QdWVe8Rrv9x3lf b0Ta4t6sfCWcbmNKpFQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-29_02,2026-06-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 suspectscore=0 priorityscore=1501 lowpriorityscore=0 impostorscore=0 spamscore=0 malwarescore=0 bulkscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606290074 On 6/29/26 7:18 AM, Qiang Yu wrote: > On Tue, Jun 16, 2026 at 04:07:27PM +0200, Konrad Dybcio wrote: >> On 5/19/26 7:47 AM, Qiang Yu wrote: >>> Add two sets of constants to phy-qcom-qmp.h to support upcoming multiple >>> link mode QMP PHY: >>> >>> - QMP_PHY_SELECTOR_0 / QMP_PHY_SELECTOR_1: generic logical PHY index >>> values for QMP providers that expose multiple PHY instances under a >>> single DT node (i.e. #phy-cells = <1>). >>> >>> - QMP_PCIE_GLYMUR_MODE_X8 / QMP_PCIE_GLYMUR_MODE_X4X4: link-mode >>> values for the Glymur Gen5x8 PCIe PHY "qcom,link-mode" syscon property, >>> selecting between the x8 single-PHY and x4+x4 dual-PHY topologies. >>> >>> Signed-off-by: Qiang Yu >>> --- >>> include/dt-bindings/phy/phy-qcom-qmp.h | 8 ++++++++ >>> 1 file changed, 8 insertions(+) >>> >>> diff --git a/include/dt-bindings/phy/phy-qcom-qmp.h b/include/dt-bindings/phy/phy-qcom-qmp.h >>> index 6b43ea9e0051..befa76f8392f 100644 >>> --- a/include/dt-bindings/phy/phy-qcom-qmp.h >>> +++ b/include/dt-bindings/phy/phy-qcom-qmp.h >>> @@ -21,4 +21,12 @@ >>> #define QMP_PCIE_PIPE_CLK 0 >>> #define QMP_PCIE_PHY_AUX_CLK 1 >>> >>> +/* Generic QMP logical PHY selectors */ >>> +#define QMP_PHY_SELECTOR_0 0 >>> +#define QMP_PHY_SELECTOR_1 1 >> >> Is this for the second phy cell? FWIW I think it's fine to use raw >> numbers as they're just indices (i.e. "nth bifurcated phy") anyway > > I can't use lane numbers. In x4+x4 case, I need to tell phy the first 4 > lanes or second 4 lanes are required. I didn't mean lane indices, but instead the same numbers you defined, without the name. It's a minor difference though, and ultimately both work for me. Konrad