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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7324f22fd95sm11016795b3a.11.2025.02.19.10.16.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Feb 2025 10:16:56 -0800 (PST) Message-ID: Date: Wed, 19 Feb 2025 10:16:55 -0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/4] thermal: qcom-spmi-temp-alarm: add support for LITE PMIC peripherals To: Dmitry Baryshkov Cc: amitk@kernel.org, thara.gopinath@gmail.com, rafael@kernel.org, daniel.lezcano@linaro.org, rui.zhang@intel.com, lukasz.luba@arm.com, david.collins@oss.qualcomm.com, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250213210403.3396392-1-anjelique.melendez@oss.qualcomm.com> <20250213210403.3396392-5-anjelique.melendez@oss.qualcomm.com> <2v2nxdv2ofd2cwvatrpmo6w7o46o26y6w77myioailuin5ymal@z2mabzkbcrgl> Content-Language: en-US From: Anjelique Melendez In-Reply-To: <2v2nxdv2ofd2cwvatrpmo6w7o46o26y6w77myioailuin5ymal@z2mabzkbcrgl> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: ky1psBJuWjpzFRqJvJH3iOijporURP_5 X-Proofpoint-ORIG-GUID: ky1psBJuWjpzFRqJvJH3iOijporURP_5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-19_08,2025-02-19_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 mlxlogscore=999 spamscore=0 clxscore=1015 priorityscore=1501 phishscore=0 mlxscore=0 bulkscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502190140 On 2/13/2025 2:09 PM, Dmitry Baryshkov wrote: > On Thu, Feb 13, 2025 at 01:04:03PM -0800, Anjelique Melendez wrote: >> Add support for TEMP_ALARM LITE PMIC peripherals. This subtype >> utilizes a pair of registers to configure a warning interrupt >> threshold temperature and an automatic hardware shutdown >> threshold temperature. >> >> Signed-off-by: David Collins >> Signed-off-by: Anjelique Melendez >> --- >> drivers/thermal/qcom/qcom-spmi-temp-alarm.c | 204 +++++++++++++++++++- >> 1 file changed, 203 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c >> index a10f368f2039..081db1a85b8a 100644 >> --- a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c >> +++ b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c >> @@ -22,6 +22,7 @@ >> #define QPNP_TM_REG_TYPE 0x04 >> #define QPNP_TM_REG_SUBTYPE 0x05 >> #define QPNP_TM_REG_STATUS 0x08 >> +#define QPNP_TM_REG_IRQ_STATUS 0x10 > > Is it a generic register or a LITE one? > This is generic register. All temp alarm devices have this IRQ status register at 0x10 offset but only temp alarm LITE devices read this register Thanks, Anjelique