From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Manivannan Sadhasivam <mani@kernel.org>,
Mrinmay Sarkar <quic_msarkar@quicinc.com>
Cc: agross@kernel.org, andersson@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
robh+dt@kernel.org, quic_shazhuss@quicinc.com,
quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com,
quic_nayiluri@quicinc.com, dmitry.baryshkov@linaro.org,
robh@kernel.org, quic_krichai@quicinc.com,
quic_vbadigan@quicinc.com, quic_parass@quicinc.com,
quic_schintav@quicinc.com, quic_shijjose@quicinc.com,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v4 1/3] PCI: qcom: Enable cache coherency for SA8775P RC
Date: Thu, 30 Nov 2023 11:09:59 +0100 [thread overview]
Message-ID: <a9c2532a-eaa6-4019-8ce9-5a58b1b720b2@linaro.org> (raw)
In-Reply-To: <20231130052116.GA3043@thinkpad>
On 30.11.2023 06:21, Manivannan Sadhasivam wrote:
> On Tue, Nov 21, 2023 at 08:08:11PM +0530, Mrinmay Sarkar wrote:
>> In a multiprocessor system cache snooping maintains the consistency
>> of caches. Snooping logic is disabled from HW on this platform.
>> Cache coherency doesn’t work without enabling this logic.
>>
>> 8775 has IP version 1.34.0 so intruduce a new cfg(cfg_1_34_0) for this
>> platform. Assign no_snoop_override flag into struct qcom_pcie_cfg and
>> set it true in cfg_1_34_0 and enable cache snooping if this particular
>> flag is true.
>>
>
> I just happen to check the internal register details of other platforms and I
> see this PCIE_PARF_NO_SNOOP_OVERIDE register with the reset value of 0x0. So
> going by the logic of this patch, this register needs to be configured for other
> platforms as well to enable cache coherency, but it seems like not the case as
> we never did and all are working fine (so far no issues reported).
Guess we know that already [1]
The question is whether this override is necessary, or the default
internal state is OK on other platforms
Konrad
[1] https://lore.kernel.org/linux-arm-msm/cb4324aa-8035-ce6e-94ef-a31ed070225c@quicinc.com/
next prev parent reply other threads:[~2023-11-30 10:10 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-21 14:38 [PATCH v4 0/3] arm64: qcom: sa8775p: add cache coherency support for SA8775P Mrinmay Sarkar
2023-11-21 14:38 ` [PATCH v4 1/3] PCI: qcom: Enable cache coherency for SA8775P RC Mrinmay Sarkar
2023-11-21 18:40 ` Dmitry Baryshkov
2023-11-30 5:21 ` Manivannan Sadhasivam
2023-11-30 10:09 ` Konrad Dybcio [this message]
2023-11-30 11:09 ` Manivannan Sadhasivam
2024-02-19 8:32 ` [PATCH v4 1/3] PCI: qcom: Enable cache coherency for SA8775P RC\ Manivannan Sadhasivam
2023-11-21 14:38 ` [PATCH v4 2/3] PCI: qcom-ep: Enable cache coherency for SA8775P EP Mrinmay Sarkar
2023-11-21 14:38 ` [PATCH v4 3/3] arm64: dts: qcom: sa8775p: Mark PCIe EP controller as cache coherent Mrinmay Sarkar
2023-11-21 14:55 ` Johan Hovold
2023-11-21 15:32 ` Mrinmay Sarkar
2023-11-21 15:39 ` Johan Hovold
2023-11-22 16:06 ` [PATCH v4 0/3] arm64: qcom: sa8775p: add cache coherency support for SA8775P Konrad Dybcio
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