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Sat, 19 Apr 2025 17:47:24 -0700 (PDT) Received: from localhost ([2804:30c:90e:1e00:5265:5254:2e32:7e5]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-22c50bf543esm39858255ad.95.2025.04.19.17.47.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Apr 2025 17:47:23 -0700 (PDT) Date: Sat, 19 Apr 2025 21:48:34 -0300 From: Marcelo Schmitt To: Gabriel Shahrouzi Cc: gregkh@linuxfoundation.org, jic23@kernel.org, lars@metafoo.de, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Michael.Hennerich@analog.com, skhan@linuxfoundation.org, kernelmentees@lists.linuxfoundation.org, stable@vger.kernel.org Subject: Re: [PATCH] iio: ad5933: Correct settling cycles encoding per datasheet Message-ID: References: <20250416142219.554938-1-gshahrouzi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: ... > > > @@ -411,14 +417,15 @@ static ssize_t ad5933_store(struct device *dev, > > > ret = ad5933_cmd(st, 0); > > > break; > > > case AD5933_OUT_SETTLING_CYCLES: > > > - val = clamp(val, (u16)0, (u16)0x7FF); > > > + val = clamp(val, (u16)0, (u16)AD5933_MAX_SETTLING_CYCLES); > > > st->settling_cycles = val; > > > > > > - /* 2x, 4x handling, see datasheet */ > > > + /* Encode value for register: D10..D0 */ > > > + /* Datasheet Table 13: If cycles > 1022 -> val/4, set bits D10=1, D9=1 */ > > > if (val > 1022) > > > - val = (val >> 2) | (3 << 9); > > > - else if (val > 511) > > > - val = (val >> 1) | BIT(9); > > > + val = (val >> 2) | AD5933_SETTLE_MUL_4X; > > then this would become something like > > > > reg_data &= ~AD5933_SETTLE_MUL_MSK; > > reg_data |= FIELD_PREP(AD5933_SETTLE_MUL_MSK, AD5933_SETTLE_MUL_4X); > > reg_data &= ~AD5933_SETTLING_TIME_CYCLES_MSK; > > reg_data |= FIELD_PREP(AD5933_SETTLING_TIME_CYCLES_MSK, val >> 2); > I currently have: > val >>= 2; > val |= FIELD_PREP(AD5933_SETTLING_MULTIPLIER_MASK, > AD5933_SETTLING_MULTIPLIER_VAL_X4); > which assumes val only has bits within a certain range which I believe > is the case here but not completely sure. Would it be better to clear > the bits regardless and then apply said operations? Nah, since val is being clamped to max settling time value, I think this is good. > > ... > > > > Though, I guess it would then be preferable to use masks and bitfield macros for > > all other places where we handle register data in ad5933 driver. Probably > > something for a different patch (if worth it). > I separated the original fix from the refactoring so the patches stay > modular. I can apply the use of masks and bitfield macros for other > register data. Should the refactoring be all in one patch or spread > across multiple? I believe all mask/bitfield refactoring can be done in one patch.