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Wed, 07 May 2025 13:50:31 -0700 (PDT) Received: from lg ([50.205.20.42]) by smtp.gmail.com with ESMTPSA id 3f1490d57ef6-e78ee3f4c0dsm190768276.31.2025.05.07.13.50.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 May 2025 13:50:31 -0700 (PDT) From: Fan Ni X-Google-Original-From: Fan Ni Date: Wed, 7 May 2025 13:50:28 -0700 To: Ira Weiny Cc: Dave Jiang , Jonathan Cameron , Dan Williams , Davidlohr Bueso , Alison Schofield , Vishal Verma , linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH v9 06/19] cxl/port: Add 'dynamic_ram_a' to endpoint decoder mode Message-ID: References: <20250413-dcd-type2-upstream-v9-0-1d4911a0b365@intel.com> <20250413-dcd-type2-upstream-v9-6-1d4911a0b365@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250413-dcd-type2-upstream-v9-6-1d4911a0b365@intel.com> On Sun, Apr 13, 2025 at 05:52:14PM -0500, Ira Weiny wrote: > Endpoints can now support a single dynamic ram partition following the > persistent memory partition. > > Expand the mode to allow a decoder to point to the first dynamic ram > partition. > > Signed-off-by: Ira Weiny > Reviewed-by: Fan Ni > --- > Changes: > [iweiny: completely re-written] > --- > Documentation/ABI/testing/sysfs-bus-cxl | 18 +++++++++--------- > drivers/cxl/core/port.c | 4 ++++ > 2 files changed, 13 insertions(+), 9 deletions(-) > > diff --git a/Documentation/ABI/testing/sysfs-bus-cxl b/Documentation/ABI/testing/sysfs-bus-cxl > index 2b59041bb410..b2754e6047ca 100644 > --- a/Documentation/ABI/testing/sysfs-bus-cxl > +++ b/Documentation/ABI/testing/sysfs-bus-cxl > @@ -358,22 +358,22 @@ Description: > > > What: /sys/bus/cxl/devices/decoderX.Y/mode > -Date: May, 2022 > -KernelVersion: v6.0 > +Date: May, 2022, May 2025 > +KernelVersion: v6.0, v6.16 (dynamic_ram_a) > Contact: linux-cxl@vger.kernel.org > Description: > (RW) When a CXL decoder is of devtype "cxl_decoder_endpoint" it > translates from a host physical address range, to a device > local address range. Device-local address ranges are further > - split into a 'ram' (volatile memory) range and 'pmem' > - (persistent memory) range. The 'mode' attribute emits one of > - 'ram', 'pmem', or 'none'. The 'none' indicates the decoder is > - not actively decoding, or no DPA allocation policy has been > - set. > + split into a 'ram' (volatile memory) range, 'pmem' (persistent > + memory), and 'dynamic_ram_a' (first Dynamic RAM) range. The > + 'mode' attribute emits one of 'ram', 'pmem', 'dynamic_ram_a' or > + 'none'. The 'none' indicates the decoder is not actively > + decoding, or no DPA allocation policy has been set. > > 'mode' can be written, when the decoder is in the 'disabled' > - state, with either 'ram' or 'pmem' to set the boundaries for the > - next allocation. > + state, with either 'ram', 'pmem', or 'dynamic_ram_a' to set the > + boundaries for the next allocation. > > > What: /sys/bus/cxl/devices/decoderX.Y/dpa_resource > diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c > index 0fd6646c1a2e..e98605bd39b4 100644 > --- a/drivers/cxl/core/port.c > +++ b/drivers/cxl/core/port.c > @@ -125,6 +125,7 @@ static DEVICE_ATTR_RO(name) > > CXL_DECODER_FLAG_ATTR(cap_pmem, CXL_DECODER_F_PMEM); > CXL_DECODER_FLAG_ATTR(cap_ram, CXL_DECODER_F_RAM); > +CXL_DECODER_FLAG_ATTR(cap_dynamic_ram_a, CXL_DECODER_F_RAM); > CXL_DECODER_FLAG_ATTR(cap_type2, CXL_DECODER_F_TYPE2); > CXL_DECODER_FLAG_ATTR(cap_type3, CXL_DECODER_F_TYPE3); > CXL_DECODER_FLAG_ATTR(locked, CXL_DECODER_F_LOCK); > @@ -219,6 +220,8 @@ static ssize_t mode_store(struct device *dev, struct device_attribute *attr, > mode = CXL_PARTMODE_PMEM; > else if (sysfs_streq(buf, "ram")) > mode = CXL_PARTMODE_RAM; > + else if (sysfs_streq(buf, "dynamic_ram_a")) > + mode = CXL_PARTMODE_DYNAMIC_RAM_A; > else > return -EINVAL; > > @@ -324,6 +327,7 @@ static struct attribute_group cxl_decoder_base_attribute_group = { > static struct attribute *cxl_decoder_root_attrs[] = { > &dev_attr_cap_pmem.attr, > &dev_attr_cap_ram.attr, > + &dev_attr_cap_dynamic_ram_a.attr, > &dev_attr_cap_type2.attr, > &dev_attr_cap_type3.attr, > &dev_attr_target_list.attr, > > -- > 2.49.0 > -- Fan Ni