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Thu, 29 May 2025 10:55:22 -0700 (PDT) Date: Thu, 29 May 2025 10:55:20 -0700 From: Deepak Gupta To: Andy Chiu Cc: Alexandre Ghiti , Cyril Bur , samuel.holland@sifive.com, ben.dooks@codethink.co.uk, palmer@dabbelt.com, linux-kernel@vger.kernel.org, jszhang@kernel.org, paul.walmsley@sifive.com, charlie@rivosinc.com, jrtc27@jrtc27.com, aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org Subject: Re: [PATCH] riscv: uaccess: Only restore the CSR_STATUS SUM bit Message-ID: References: <20250522160954.429333-1-cyrilbur@tenstorrent.com> <2c07d65e-0641-42a0-9eb4-9e42d9325ff2@ghiti.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Thu, May 29, 2025 at 12:17:24AM +0800, Andy Chiu wrote: >On Tue, May 27, 2025 at 4:39 AM Alexandre Ghiti wrote: >> >> +cc linux-riscv, Andy, Deepak >> >> On 5/22/25 18:09, Cyril Bur wrote: >> > During switch to csrs will OR the value of the register into the >> > corresponding csr. In this case we're only interested in restoring the >> > SUM bit not the entire register. >> > >> > Fixes: 788aa64c0 ("riscv: save the SR_SUM status over switches") >> > Signed-off-by: Cyril Bur >> > --- >> > I've put the Fixes tag in but I assume this will get squashed into the >> > patch. Either way I hope this works to fix the immediate issue. >> > >> > arch/riscv/kernel/entry.S | 12 ++++++++---- >> > 1 file changed, 8 insertions(+), 4 deletions(-) >> > >> > diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S >> > index 00bd0de9faa2..6ed3bd80903d 100644 >> > --- a/arch/riscv/kernel/entry.S >> > +++ b/arch/riscv/kernel/entry.S >> > @@ -399,14 +399,18 @@ SYM_FUNC_START(__switch_to) >> > REG_S s11, TASK_THREAD_S11_RA(a3) >> > >> > /* save the user space access flag */ >> > - li s0, SR_SUM >> > - csrr s1, CSR_STATUS >> > - REG_S s1, TASK_THREAD_STATUS_RA(a3) >> > + csrr s0, CSR_STATUS >> > + REG_S s0, TASK_THREAD_STATUS_RA(a3) >> > >> > /* Save the kernel shadow call stack pointer */ >> > scs_save_current >> > - /* Restore context from next->thread */ >> > + /* >> > + * Restore context from next->thread. csrs will OR the bits from s0 and >> > + * only want to restore the SR_SUM bit >> > + */ >> > REG_L s0, TASK_THREAD_STATUS_RA(a4) >> > + li s1, SR_SUM >> > + and s0, s0, s1 >> > csrs CSR_STATUS, s0 >> > REG_L ra, TASK_THREAD_RA_RA(a4) >> > REG_L sp, TASK_THREAD_SP_RA(a4) >> >> To conclude the discussion we had here >> https://lore.kernel.org/linux-riscv/aDCtATl2N21fBsyT@debug.ba.rivosinc.com/#t, >> in addition to Cyril's patch above, to me we only have to rename the >> status field into sum and we're good to go. @Andy, @Deepak @Samuel Do >> you agree? > >LGTM, thanks! > >Andy Sounds good to me. > >> >> As this is an important fix (along with 2 other fixes, one for thead >> vector and vdso static values), I'd like to send another PR soon for >> inclusion in 6.16-rc1, I did not want to delay the second PR any longer. >> >> Thanks for your feedbacks, >> >> Alex >> >>