From: Ben Zong-You Xie <ben717@andestech.com>
To: Conor Dooley <conor@kernel.org>
Cc: <paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
<aou@eecs.berkeley.edu>, <alex@ghiti.fr>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>, <tglx@linutronix.de>,
<daniel.lezcano@linaro.org>,
<prabhakar.mahadev-lad.rj@bp.renesas.com>,
<devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <tim609@andestech.com>
Subject: Re: [PATCH v5 0/8] add Voyager board support
Date: Mon, 9 Jun 2025 20:06:07 +0800 [thread overview]
Message-ID: <aEbOLztcBsKs84pn@atctrx.andestech.com> (raw)
In-Reply-To: <20250606-booth-icky-b416c1827a43@spud>
On Fri, Jun 06, 2025 at 05:00:06PM +0100, Conor Dooley wrote:
> [EXTERNAL MAIL]
> Date: Fri, 6 Jun 2025 17:00:06 +0100
> From: Conor Dooley <conor@kernel.org>
> To: Ben Zong-You Xie <ben717@andestech.com>
> Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu,
> alex@ghiti.fr, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
> tglx@linutronix.de, daniel.lezcano@linaro.org,
> prabhakar.mahadev-lad.rj@bp.renesas.com, devicetree@vger.kernel.org,
> linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
> tim609@andestech.com
> Subject: Re: [PATCH v5 0/8] add Voyager board support
>
> On Mon, Jun 02, 2025 at 02:07:39PM +0800, Ben Zong-You Xie wrote:
> > The Voyager is a 9.6” x 9.6” Micro ATX form factor development board
> > including Andes QiLai SoC. This patch series adds minimal device tree
> > files for the QiLai SoC and the Voyager board [1].
> >
> > Now only support basic uart drivers to boot up into a basic console. Other
> > features will be added later.
> >
> > [1] https://www.andestech.com/en/products-solutions/andeshape-platforms/qilai-chip/
>
> Ball is in your court now, after rc1 make a tree and get it in
> linux-next, and then send a pr to soc@kernel.org with this new content.
> Perhaps the defconfig should go separately, I can take that one if you
> want.
>
> Cheers,
> Conor.
Hi Conor,
Thanks for your guidance on these patches. I will send a PR to
soc@kernel.org as you suggested.
For the defconfig patch, I'm happy for you to handle it. Just let me
know if there's anything specific you'd like me to include.
Thanks,
Ben
next prev parent reply other threads:[~2025-06-09 12:07 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-02 6:07 Ben Zong-You Xie
2025-06-02 6:07 ` [PATCH v5 1/8] riscv: add Andes SoC family Kconfig support Ben Zong-You Xie
2025-06-02 6:07 ` [PATCH v5 2/8] dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings Ben Zong-You Xie
2025-06-02 6:07 ` [PATCH v5 3/8] dt-bindings: interrupt-controller: add Andes QiLai PLIC Ben Zong-You Xie
2025-06-02 6:07 ` [PATCH v5 4/8] dt-bindings: interrupt-controller: add Andes machine-level software interrupt controller Ben Zong-You Xie
2025-06-02 6:07 ` [PATCH v5 5/8] dt-bindings: timer: add Andes machine timer Ben Zong-You Xie
2025-06-02 6:07 ` [PATCH v5 6/8] riscv: dts: andes: add QiLai SoC device tree Ben Zong-You Xie
2025-06-02 6:07 ` [PATCH v5 7/8] riscv: dts: andes: add Voyager board " Ben Zong-You Xie
2025-06-02 6:07 ` [PATCH v5 8/8] riscv: defconfig: enable Andes SoC Ben Zong-You Xie
2025-06-06 16:00 ` [PATCH v5 0/8] add Voyager board support Conor Dooley
2025-06-09 12:06 ` Ben Zong-You Xie [this message]
2025-06-09 16:16 ` Conor Dooley
2025-06-09 16:17 ` Conor Dooley
2025-06-11 16:13 ` Ben Zong-You Xie
2025-06-11 16:21 ` Conor Dooley
2025-07-03 15:32 ` Arnd Bergmann
2025-07-03 15:53 ` Conor Dooley
2025-07-03 16:42 ` Arnd Bergmann
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